1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2008 Extreme Engineering Solutions, Inc.
5 * This driver support NAND devices which have address lines
6 * connected as ALE and CLE inputs.
14 * Hardware specific access to control-lines
16 static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
18 struct nand_chip *this = mtd_to_nand(mtd);
21 if (ctrl & NAND_CTRL_CHANGE) {
22 IO_ADDR_W = (ulong)this->IO_ADDR_W;
24 IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE |
25 CONFIG_SYS_NAND_ACTL_ALE |
26 CONFIG_SYS_NAND_ACTL_NCE);
28 IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE;
30 IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE;
32 IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE;
34 this->IO_ADDR_W = (void *)IO_ADDR_W;
37 if (cmd != NAND_CMD_NONE)
38 writeb(cmd, this->IO_ADDR_W);
41 int board_nand_init(struct nand_chip *nand)
43 nand->ecc.mode = NAND_ECC_SOFT;
44 nand->cmd_ctrl = nand_addr_hwcontrol;
45 nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY;