1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
9 #include <asm/arch/clock.h>
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/mx7-pins.h>
12 #include <asm/arch/sys_proto.h>
14 #include <asm/mach-imx/hab.h>
15 #include <asm/mach-imx/iomux-v3.h>
19 #include <asm/arch/crm_regs.h>
21 #include <power/pmic.h>
22 #include <power/pfuze3000_pmic.h>
23 #include "../freescale/common/pfuze.h"
24 #include <asm/setup.h>
25 #include <asm/bootm.h>
27 DECLARE_GLOBAL_DATA_PTR;
29 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
34 gd->ram_size = PHYS_SDRAM_SIZE;
36 /* Subtract the defined OPTEE runtime firmware length */
37 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
38 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
44 static iomux_v3_cfg_t const wdog_pads[] = {
45 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
48 static iomux_v3_cfg_t const uart1_pads[] = {
49 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
50 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
53 static void setup_iomux_uart(void)
55 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
58 int board_early_init_f(void)
66 int power_init_board(void)
69 int ret, dev_id, rev_id;
71 ret = pmic_get("pfuze3000@8", &dev);
77 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
78 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
79 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
81 /* disable Low Power Mode during standby mode */
82 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
88 int board_eth_init(bd_t *bis)
92 #ifdef CONFIG_USB_ETHER
93 ret = usb_eth_initialize(bis);
95 printf("Error %d registering USB ether.\n", ret);
103 /* address of boot parameters */
104 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
113 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
118 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
119 unsigned long optee_start, optee_end;
121 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
122 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
124 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
125 mode, optee_start, optee_end);
127 printf("Board: WARP7 in %s mode\n", mode);
133 int board_late_init(void)
135 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
136 #ifdef CONFIG_SERIAL_TAG
137 struct tag_serialnr serialnr;
138 char serial_string[0x20];
141 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
143 set_wdog_reset(wdog);
146 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
147 * since we use PMIC_PWRON to reset the board.
149 clrsetbits_le16(&wdog->wcr, 0, 0x10);
151 #ifdef CONFIG_IMX_HAB
152 /* Determine HAB state */
153 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
155 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
158 #ifdef CONFIG_SERIAL_TAG
159 /* Set serial# standard environment variable based on OTP settings */
160 get_board_serial(&serialnr);
161 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
162 serialnr.low, serialnr.high);
163 env_set("serial#", serial_string);