board/warp7/warp7.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2016 NXP Semiconductors
   4  * Author: Fabio Estevam <fabio.estevam@nxp.com>
   5  */
   6
   7 #include <asm/arch/clock.h>
   8 #include <asm/arch/imx-regs.h>
   9 #include <asm/arch/mx7-pins.h>
  10 #include <asm/arch/sys_proto.h>
  11 #include <asm/gpio.h>
  12 #include <asm/mach-imx/hab.h>
  13 #include <asm/mach-imx/iomux-v3.h>
  14 #include <asm/io.h>
  15 #include <common.h>
  16 #include <asm/arch/crm_regs.h>
  17 #include <netdev.h>
  18 #include <power/pmic.h>
  19 #include <power/pfuze3000_pmic.h>
  20 #include "../freescale/common/pfuze.h"
  21 #include <asm/setup.h>
  22 #include <asm/bootm.h>
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 #define UART_PAD_CTRL  (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
  27                         PAD_CTL_HYS)
  28
  29 int dram_init(void)
  30 {
  31         gd->ram_size = PHYS_SDRAM_SIZE;
  32
  33         /* Subtract the defined OPTEE runtime firmware length */
  34 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
  35                 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
  36 #endif
  37
  38         return 0;
  39 }
  40
  41 static iomux_v3_cfg_t const wdog_pads[] = {
  42         MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
  43 };
  44
  45 static iomux_v3_cfg_t const uart1_pads[] = {
  46         MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  47         MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  48 };
  49
  50 static void setup_iomux_uart(void)
  51 {
  52         imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  53 };
  54
  55 int board_early_init_f(void)
  56 {
  57         setup_iomux_uart();
  58
  59         return 0;
  60 }
  61
  62 #ifdef CONFIG_DM_PMIC
  63 int power_init_board(void)
  64 {
  65         struct udevice *dev;
  66         int ret, dev_id, rev_id;
  67
  68         ret = pmic_get("pfuze3000", &dev);
  69         if (ret == -ENODEV)
  70                 return 0;
  71         if (ret != 0)
  72                 return ret;
  73
  74         dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
  75         rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
  76         printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
  77
  78         /* disable Low Power Mode during standby mode */
  79         pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
  80
  81         return 0;
  82 }
  83 #endif
  84
  85 int board_eth_init(bd_t *bis)
  86 {
  87         int ret = 0;
  88
  89 #ifdef CONFIG_USB_ETHER
  90         ret = usb_eth_initialize(bis);
  91         if (ret < 0)
  92                 printf("Error %d registering USB ether.\n", ret);
  93 #endif
  94
  95         return ret;
  96 }
  97
  98 int board_init(void)
  99 {
 100         /* address of boot parameters */
 101         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 102
 103         return 0;
 104 }
 105
 106 int checkboard(void)
 107 {
 108         char *mode;
 109
 110         if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
 111                 mode = "secure";
 112         else
 113                 mode = "non-secure";
 114
 115 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
 116         unsigned long optee_start, optee_end;
 117
 118         optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
 119         optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
 120
 121         printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
 122                mode, optee_start, optee_end);
 123 #else
 124         printf("Board: WARP7 in %s mode\n", mode);
 125 #endif
 126
 127         return 0;
 128 }
 129
 130 int board_late_init(void)
 131 {
 132         struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
 133 #ifdef CONFIG_SERIAL_TAG
 134         struct tag_serialnr serialnr;
 135         char serial_string[0x20];
 136 #endif
 137
 138         imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 139
 140         set_wdog_reset(wdog);
 141
 142         /*
 143          * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
 144          * since we use PMIC_PWRON to reset the board.
 145          */
 146         clrsetbits_le16(&wdog->wcr, 0, 0x10);
 147
 148 #ifdef CONFIG_SECURE_BOOT
 149         /* Determine HAB state */
 150         env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
 151 #else
 152         env_set_ulong(HAB_ENABLED_ENVNAME, 0);
 153 #endif
 154
 155 #ifdef CONFIG_SERIAL_TAG
 156         /* Set serial# standard environment variable based on OTP settings */
 157         get_board_serial(&serialnr);
 158         snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
 159                  serialnr.low, serialnr.high);
 160         env_set("serial#", serial_string);
 161 #endif
 162
 163         return 0;
 164 }