3 * Stefano Babic, DENX Gmbh, sbabic@denx.de
6 * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
15 * SPDX-License-Identifier: GPL-2.0+
19 #include <asm/arch/pxa-regs.h>
20 #include <asm/arch/pxa.h>
21 #include <asm/arch/regs-mmc.h>
25 DECLARE_GLOBAL_DATA_PTR;
27 #define RH_A_PSM (1 << 8) /* power switching mode */
28 #define RH_A_NPS (1 << 9) /* no power switching */
30 extern struct serial_device serial_ffuart_device;
31 extern struct serial_device serial_btuart_device;
32 extern struct serial_device serial_stuart_device;
35 #define BOOT_CONSOLE "serial_stuart"
37 #define BOOT_CONSOLE "serial_ffuart"
39 /* ------------------------------------------------------------------------- */
42 * Miscelaneous platform dependent initialisations
45 int usb_board_init(void)
47 writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
48 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
51 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
53 while (readl(UHCHR) & UHCHR_FSBIR)
56 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
57 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
59 /* Clear any OTG Pin Hold */
60 if (readl(PSSR) & PSSR_OTGPH)
61 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
63 writel(readl(UHCRHDA) & ~(RH_A_NPS), UHCRHDA);
64 writel(readl(UHCRHDA) | RH_A_PSM, UHCRHDA);
66 /* Set port power control mask bits, only 3 ports. */
67 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
72 void usb_board_init_fail(void)
77 void usb_board_stop(void)
79 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
81 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
83 writel(readl(UHCCOMS) | 1, UHCCOMS);
86 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
93 /* We have RAM, disable cache */
97 /* arch number of ConXS Board */
98 gd->bd->bi_arch_number = 776;
100 /* adress of boot parameters */
101 gd->bd->bi_boot_params = 0xa000003c;
106 int board_late_init(void)
108 char *console=getenv("boot_console");
110 if ((console == NULL) || (strcmp(console,"serial_btuart") &&
111 strcmp(console,"serial_stuart") &&
112 strcmp(console,"serial_ffuart"))) {
113 console = BOOT_CONSOLE;
115 setenv("stdout",console);
116 setenv("stdin", console);
117 setenv("stderr",console);
124 gd->ram_size = PHYS_SDRAM_1_SIZE;
128 void dram_init_banksize(void)
130 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
131 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
134 #ifdef CONFIG_DRIVER_DM9000
135 int board_eth_init(bd_t *bis)
137 return dm9000_initialize(bis);
141 #ifdef CONFIG_CMD_MMC
142 int board_mmc_init(bd_t *bis)