1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012 Lucas Stach
9 #include <asm/arch/clock.h>
10 #include <asm/arch/funcmux.h>
11 #include <asm/arch/pinmux.h>
12 #include <asm/arch-tegra/ap.h>
13 #include <asm/arch-tegra/board.h>
14 #include <asm/arch-tegra/tegra.h>
19 #include <linux/delay.h>
20 #include "../common/tdx-common.h"
22 DECLARE_GLOBAL_DATA_PTR;
24 #define PMU_I2C_ADDRESS 0x34
25 #define MAX_I2C_RETRY 3
26 #define PMU_SUPPLYENE 0x14
27 #define PMU_SUPPLYENE_SYSINEN (1<<5)
28 #define PMU_SUPPLYENE_EXITSLREQ (1<<1)
30 int arch_misc_init(void)
32 /* Disable PMIC sleep mode on low supply voltage */
37 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
39 debug("%s: Cannot find PMIC I2C chip\n", __func__);
45 err = dm_i2c_read(dev, addr, data, 1);
47 debug("failed to get PMU_SUPPLYENE\n");
51 data[0] &= ~PMU_SUPPLYENE_SYSINEN;
52 data[0] |= PMU_SUPPLYENE_EXITSLREQ;
54 err = dm_i2c_write(dev, addr, data, 1);
56 debug("failed to set PMU_SUPPLYENE\n");
60 /* make sure SODIMM pin 87 nRESET_OUT is released properly */
61 pinmux_set_func(PMUX_PINGRP_ATA, PMUX_FUNC_GMI);
63 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
65 printf("USB recovery mode\n");
72 printf("Model: Toradex Colibri T20 %dMB V%s\n",
73 (gd->ram_size == 0x10000000) ? 256 : 512,
74 (get_nand_dev_by_index(0)->erasesize >> 10 == 512) ?
75 ((gd->ram_size == 0x10000000) ? "1.1B" : "1.1C") : "1.2A");
80 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
81 int ft_board_setup(void *blob, bd_t *bd)
83 return ft_common_board_setup(blob, bd);
87 #ifdef CONFIG_MMC_SDHCI_TEGRA
89 * Routine: pin_mux_mmc
90 * Description: setup the pin muxes/tristate values for the SDMMC(s)
92 void pin_mux_mmc(void)
94 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
95 pinmux_tristate_disable(PMUX_PINGRP_GMB);
99 #ifdef CONFIG_TEGRA_NAND
100 void pin_mux_nand(void)
102 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
105 * configure pingroup ATC to something unrelated to
106 * avoid ATC overriding KBC
108 pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
112 #ifdef CONFIG_USB_EHCI_TEGRA
113 void pin_mux_usb(void)
115 /* module internal USB bus to connect ethernet chipset */
116 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
118 /* ULPI reference clock output */
119 pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
120 pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
123 pinmux_tristate_disable(PMUX_PINGRP_UAC);
126 pinmux_tristate_disable(PMUX_PINGRP_DTE);
128 /* Reset ASIX using LAN_RESET */
129 gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET");
130 gpio_direction_output(TEGRA_GPIO(V, 4), 0);
131 pinmux_tristate_disable(PMUX_PINGRP_GPV);
133 gpio_set_value(TEGRA_GPIO(V, 4), 1);
135 /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
136 pinmux_tristate_disable(PMUX_PINGRP_SPIG);
140 #ifdef CONFIG_VIDEO_TEGRA20
142 * Routine: pin_mux_display
143 * Description: setup the pin muxes/tristate values for the LCD interface)
145 void pin_mux_display(void)
148 * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
151 pinmux_tristate_disable(PMUX_PINGRP_DTA);
153 pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
154 pinmux_tristate_disable(PMUX_PINGRP_SDC);
158 * Backlight off before OS handover
160 void board_preboot_os(void)
162 gpio_request(TEGRA_GPIO(T, 4), "BL_ON");
163 gpio_direction_output(TEGRA_GPIO(T, 4), 0);