1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2012-2016 Toradex, Inc.
8 #include <asm/arch-tegra/tegra_i2c.h>
9 #include "as3722_init.h"
11 /* AS3722-PMIC-specific early init code - get CPU rails up, etc */
13 void tegra_i2c_ll_write_addr(uint addr, uint config)
15 struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
17 writel(addr, ®->cmd_addr0);
18 writel(config, ®->cnfg);
21 void tegra_i2c_ll_write_data(uint data, uint config)
23 struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
25 writel(data, ®->cmd_data1);
26 writel(config, ®->cnfg);
29 void pmic_enable_cpu_vdd(void)
31 debug("%s entry\n", __func__);
33 #ifdef AS3722_SD1VOLTAGE_DATA
34 /* Set up VDD_CORE, for boards where OTP is incorrect*/
35 debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__);
36 /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */
37 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
38 tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES);
40 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
41 * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES);
47 * Make sure all non-fused regulators are down.
48 * That way we're in known state after software reboot from linux
50 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
51 tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES);
53 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
54 tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES);
56 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
57 tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES);
59 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
60 tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES);
62 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
63 tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES);
65 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
66 tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES);
69 debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
71 * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
72 * First set VDD to 1.0V, then enable the VDD regulator.
74 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
75 tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES);
77 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
78 * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES);
82 debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__);
84 * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus.
85 * First set VDD to 1.0V, then enable the VDD regulator.
87 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
88 tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES);
90 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
91 * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES);
95 debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__);
97 * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus.
98 * First set VDD to 1.2V, then enable the VDD regulator.
100 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
101 tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES);
103 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
104 * tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES);
108 debug("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__);
110 * Bring up VDD_SDMMC1 via the AS3722 PMIC on the PWR I2C bus.
111 * First set it to value closest to 3.3V, then enable the regulator
113 * NOTE: We do this early because doing it later seems to hose the CPU
114 * power rail/partition startup. Need to debug.
116 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
117 tegra_i2c_ll_write_data(AS3722_LDO1VOLTAGE_DATA, I2C_SEND_2_BYTES);
119 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
120 * tegra_i2c_ll_write_data(AS3722_LDO1CONTROL_DATA, I2C_SEND_2_BYTES);
124 debug("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__);
126 * Bring up VDD_SDMMC3 via the AS3722 PMIC on the PWR I2C bus.
127 * First set it to bypass 3.3V straight thru, then enable the regulator
129 * NOTE: We do this early because doing it later seems to hose the CPU
130 * power rail/partition startup. Need to debug.
132 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
133 tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES);
135 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled.
136 * tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES);