board/ti/ti814x/evm.c

   1 /*
   2  * evm.c
   3  *
   4  * Board functions for TI814x EVM
   5  *
   6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <common.h>
  20 #include <cpsw.h>
  21 #include <errno.h>
  22 #include <spl.h>
  23 #include <asm/arch/cpu.h>
  24 #include <asm/arch/hardware.h>
  25 #include <asm/arch/omap.h>
  26 #include <asm/arch/ddr_defs.h>
  27 #include <asm/arch/clock.h>
  28 #include <asm/arch/gpio.h>
  29 #include <asm/arch/mmc_host_def.h>
  30 #include <asm/arch/sys_proto.h>
  31 #include <asm/io.h>
  32 #include <asm/emif.h>
  33 #include <asm/gpio.h>
  34 #include "evm.h"
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 #ifdef CONFIG_SPL_BUILD
  39 static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
  40 static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
  41 #endif
  42
  43 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
  44
  45 /* UART Defines */
  46 #ifdef CONFIG_SPL_BUILD
  47 #define UART_RESET              (0x1 << 1)
  48 #define UART_CLK_RUNNING_MASK   0x1
  49 #define UART_SMART_IDLE_EN      (0x1 << 0x3)
  50
  51 static void uart_enable(void)
  52 {
  53         u32 regVal;
  54
  55         /* UART softreset */
  56         regVal = readl(&uart_base->uartsyscfg);
  57         regVal |= UART_RESET;
  58         writel(regVal, &uart_base->uartsyscfg);
  59         while ((readl(&uart_base->uartsyssts) &
  60                 UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
  61                 ;
  62
  63         /* Disable smart idle */
  64         regVal = readl(&uart_base->uartsyscfg);
  65         regVal |= UART_SMART_IDLE_EN;
  66         writel(regVal, &uart_base->uartsyscfg);
  67 }
  68
  69 static void wdt_disable(void)
  70 {
  71         writel(0xAAAA, &wdtimer->wdtwspr);
  72         while (readl(&wdtimer->wdtwwps) != 0x0)
  73                 ;
  74         writel(0x5555, &wdtimer->wdtwspr);
  75         while (readl(&wdtimer->wdtwwps) != 0x0)
  76                 ;
  77 }
  78
  79 static const struct cmd_control evm_ddr2_cctrl_data = {
  80         .cmd0csratio    = 0x80,
  81         .cmd0dldiff     = 0x04,
  82         .cmd0iclkout    = 0x00,
  83
  84         .cmd1csratio    = 0x80,
  85         .cmd1dldiff     = 0x04,
  86         .cmd1iclkout    = 0x00,
  87
  88         .cmd2csratio    = 0x80,
  89         .cmd2dldiff     = 0x04,
  90         .cmd2iclkout    = 0x00,
  91 };
  92
  93 static const struct emif_regs evm_ddr2_emif0_regs = {
  94         .sdram_config                   = 0x40801ab2,
  95         .ref_ctrl                       = 0x10000c30,
  96         .sdram_tim1                     = 0x0aaaf552,
  97         .sdram_tim2                     = 0x043631d2,
  98         .sdram_tim3                     = 0x00000327,
  99         .emif_ddr_phy_ctlr_1            = 0x00000007
 100 };
 101
 102 static const struct emif_regs evm_ddr2_emif1_regs = {
 103         .sdram_config                   = 0x40801ab2,
 104         .ref_ctrl                       = 0x10000c30,
 105         .sdram_tim1                     = 0x0aaaf552,
 106         .sdram_tim2                     = 0x043631d2,
 107         .sdram_tim3                     = 0x00000327,
 108         .emif_ddr_phy_ctlr_1            = 0x00000007
 109 };
 110
 111 const struct dmm_lisa_map_regs evm_lisa_map_regs = {
 112         .dmm_lisa_map_0                 = 0x00000000,
 113         .dmm_lisa_map_1                 = 0x00000000,
 114         .dmm_lisa_map_2                 = 0x806c0300,
 115         .dmm_lisa_map_3                 = 0x806c0300,
 116 };
 117
 118 static const struct ddr_data evm_ddr2_data = {
 119         .datardsratio0          = ((0x35<<10) | (0x35<<0)),
 120         .datawdsratio0          = ((0x20<<10) | (0x20<<0)),
 121         .datawiratio0           = ((0<<10) | (0<<0)),
 122         .datagiratio0           = ((0<<10) | (0<<0)),
 123         .datafwsratio0          = ((0x90<<10) | (0x90<<0)),
 124         .datawrsratio0          = ((0x50<<10) | (0x50<<0)),
 125         .datauserank0delay      = 1,
 126         .datadldiff0            = 0x4,
 127 };
 128 #endif
 129
 130 /*
 131  * early system init of muxing and clocks.
 132  */
 133 void s_init(void)
 134 {
 135 #ifdef CONFIG_SPL_BUILD
 136         /*
 137          * Save the boot parameters passed from romcode.
 138          * We cannot delay the saving further than this,
 139          * to prevent overwrites.
 140          */
 141 #ifdef CONFIG_SPL_BUILD
 142         save_omap_boot_params();
 143 #endif
 144
 145         /* WDT1 is already running when the bootloader gets control
 146          * Disable it to avoid "random" resets
 147          */
 148         wdt_disable();
 149
 150         /* Enable timer */
 151         timer_init();
 152
 153         /* Setup the PLLs and the clocks for the peripherals */
 154         pll_init();
 155
 156         /* Enable RTC32K clock */
 157         rtc32k_enable();
 158
 159         /* Set UART pins */
 160         enable_uart0_pin_mux();
 161
 162         /* Set MMC pins */
 163         enable_mmc1_pin_mux();
 164
 165         /* Set Ethernet pins */
 166         enable_enet_pin_mux();
 167
 168         /* Enable UART */
 169         uart_enable();
 170
 171         gd = &gdata;
 172
 173         preloader_console_init();
 174
 175         config_dmm(&evm_lisa_map_regs);
 176
 177         config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data,
 178                    &evm_ddr2_emif0_regs, 0);
 179         config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data,
 180                    &evm_ddr2_emif1_regs, 1);
 181 #endif
 182 }
 183
 184 /*
 185  * Basic board specific setup.  Pinmux has been handled already.
 186  */
 187 int board_init(void)
 188 {
 189         gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
 190         return 0;
 191 }
 192
 193 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
 194 int board_mmc_init(bd_t *bis)
 195 {
 196         omap_mmc_init(1, 0, 0, -1, -1);
 197
 198         return 0;
 199 }
 200 #endif
 201
 202 #ifdef CONFIG_DRIVER_TI_CPSW
 203 static void cpsw_control(int enabled)
 204 {
 205         /* VTP can be added here */
 206
 207         return;
 208 }
 209
 210 static struct cpsw_slave_data cpsw_slaves[] = {
 211         {
 212                 .slave_reg_ofs  = 0x50,
 213                 .sliver_reg_ofs = 0x700,
 214                 .phy_id         = 1,
 215         },
 216         {
 217                 .slave_reg_ofs  = 0x90,
 218                 .sliver_reg_ofs = 0x740,
 219                 .phy_id         = 0,
 220         },
 221 };
 222
 223 static struct cpsw_platform_data cpsw_data = {
 224         .mdio_base              = CPSW_MDIO_BASE,
 225         .cpsw_base              = CPSW_BASE,
 226         .mdio_div               = 0xff,
 227         .channels               = 8,
 228         .cpdma_reg_ofs          = 0x100,
 229         .slaves                 = 1,
 230         .slave_data             = cpsw_slaves,
 231         .ale_reg_ofs            = 0x600,
 232         .ale_entries            = 1024,
 233         .host_port_reg_ofs      = 0x28,
 234         .hw_stats_reg_ofs       = 0x400,
 235         .mac_control            = (1 << 5),
 236         .control                = cpsw_control,
 237         .host_port_num          = 0,
 238         .version                = CPSW_CTRL_VERSION_1,
 239 };
 240 #endif
 241
 242 int board_eth_init(bd_t *bis)
 243 {
 244         uint8_t mac_addr[6];
 245         uint32_t mac_hi, mac_lo;
 246
 247         if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
 248                 printf("<ethaddr> not set. Reading from E-fuse\n");
 249                 /* try reading mac address from efuse */
 250                 mac_lo = readl(&cdev->macid0l);
 251                 mac_hi = readl(&cdev->macid0h);
 252                 mac_addr[0] = mac_hi & 0xFF;
 253                 mac_addr[1] = (mac_hi & 0xFF00) >> 8;
 254                 mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
 255                 mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
 256                 mac_addr[4] = mac_lo & 0xFF;
 257                 mac_addr[5] = (mac_lo & 0xFF00) >> 8;
 258
 259                 if (is_valid_ether_addr(mac_addr))
 260                         eth_setenv_enetaddr("ethaddr", mac_addr);
 261                 else
 262                         printf("Unable to read MAC address. Set <ethaddr>\n");
 263         }
 264
 265         return cpsw_register(&cpsw_data);
 266 }