2 * (C) Copyright 2004-2008
3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/arch/mem.h>
34 #include <asm/arch/mux.h>
35 #include <asm/arch/sys_proto.h>
37 #include <asm/mach-types.h>
40 DECLARE_GLOBAL_DATA_PTR;
42 static u32 omap3_evm_version;
44 u32 get_omap3_evm_rev(void)
46 return omap3_evm_version;
49 static void omap3_evm_get_revision(void)
51 #if defined(CONFIG_CMD_NET)
53 * Board revision can be ascertained only by identifying
54 * the Ethernet chipset.
58 /* Ethernet PHY ID is stored at ID_REV register */
59 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
60 printf("Read back SMSC id 0x%x\n", smsc_id);
63 /* SMSC9115 chipset */
65 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
67 /* SMSC 9220 chipset */
70 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
73 #if defined(CONFIG_STATIC_BOARD_REV)
75 * Look for static defintion of the board revision
77 omap3_evm_version = CONFIG_STATIC_BOARD_REV;
80 * Fallback to the default above.
82 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
84 #endif /* CONFIG_CMD_NET */
87 #ifdef CONFIG_USB_OMAP3
89 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
91 u8 omap3_evm_need_extvbus(void)
95 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
103 * Routine: board_init
104 * Description: Early hardware init.
108 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
109 /* board id for Linux */
110 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
111 /* boot param addr */
112 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
118 * Routine: misc_init_r
119 * Description: Init ethernet (done here so udelay works)
121 int misc_init_r(void)
124 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
125 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
128 #if defined(CONFIG_CMD_NET)
131 omap3_evm_get_revision();
133 #if defined(CONFIG_CMD_NET)
142 * Routine: set_muxconf_regs
143 * Description: Setting up the configuration Mux registers specific to the
144 * hardware. Many pins need to be moved from protect to primary
147 void set_muxconf_regs(void)
153 * Routine: setup_net_chip
154 * Description: Setting up the configuration GPMC registers specific to the
157 static void setup_net_chip(void)
159 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
161 /* Configure GPMC registers */
162 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
163 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
164 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
165 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
166 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
167 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
168 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
170 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
171 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
172 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
173 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
174 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
175 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
176 &ctrl_base->gpmc_nadv_ale);
180 * Reset the ethernet chip.
182 static void reset_net_chip(void)
184 struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
186 /* Make GPIO 64 as output pin */
187 writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
189 /* Now send a pulse on the GPIO pin */
190 writel(GPIO0, &gpio3_base->setdataout);
192 writel(GPIO0, &gpio3_base->cleardataout);
194 writel(GPIO0, &gpio3_base->setdataout);
197 int board_eth_init(bd_t *bis)
200 #ifdef CONFIG_SMC911X
201 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);