1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
10 #include <asm/arcregs.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 #define ARC_PERIPHERAL_BASE 0xF0000000
16 #define CGU_ARC_FMEAS_ARC (void *)(ARC_PERIPHERAL_BASE + 0x84)
17 #define CGU_ARC_FMEAS_ARC_START BIT(31)
18 #define CGU_ARC_FMEAS_ARC_DONE BIT(30)
19 #define CGU_ARC_FMEAS_ARC_CNT_MASK GENMASK(14, 0)
20 #define CGU_ARC_FMEAS_ARC_RCNT_OFFSET 0
21 #define CGU_ARC_FMEAS_ARC_FCNT_OFFSET 15
23 #define SDIO_BASE (void *)(ARC_PERIPHERAL_BASE + 0x10000)
25 int mach_cpu_init(void)
30 /* Start frequency measurement */
31 writel(CGU_ARC_FMEAS_ARC_START, CGU_ARC_FMEAS_ARC);
35 data = readl(CGU_ARC_FMEAS_ARC);
36 } while (!(data & CGU_ARC_FMEAS_ARC_DONE));
38 /* Amount of reference 100 MHz clocks */
39 rcnt = ((data >> CGU_ARC_FMEAS_ARC_RCNT_OFFSET) &
40 CGU_ARC_FMEAS_ARC_CNT_MASK);
42 /* Amount of CPU clocks */
43 fcnt = ((data >> CGU_ARC_FMEAS_ARC_FCNT_OFFSET) &
44 CGU_ARC_FMEAS_ARC_CNT_MASK);
46 gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000;
51 int board_early_init_r(void)
53 #define EMSDP_PSRAM_BASE 0xf2001000
54 #define PSRAM_FLASH_CONFIG_REG_0 (void *)(EMSDP_PSRAM_BASE + 0x10)
55 #define PSRAM_FLASH_CONFIG_REG_1 (void *)(EMSDP_PSRAM_BASE + 0x14)
56 #define CRE_ENABLE BIT(31)
57 #define CRE_DRIVE_CMD BIT(6)
59 #define PSRAM_RCR_DPD BIT(1)
60 #define PSRAM_RCR_PAGE_MODE BIT(7)
63 * PSRAM_FLASH_CONFIG_REG_x[30:15] to the address lines[16:1] of flash,
66 #define PSRAM_RCR_SETUP ((PSRAM_RCR_DPD | PSRAM_RCR_PAGE_MODE) << 1)
68 // Switch PSRAM controller to command mode
69 writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_0);
70 // Program Refresh Configuration Register (RCR) for BANK0
71 writew(0, (void *)(0x10000000 + PSRAM_RCR_SETUP));
72 // Switch PSRAM controller back to memory mode
73 writel(0, PSRAM_FLASH_CONFIG_REG_0);
76 // Switch PSRAM controller to command mode
77 writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_1);
78 // Program Refresh Configuration Register (RCR) for BANK1
79 writew(0, (void *)(0x10800000 + PSRAM_RCR_SETUP));
80 // Switch PSRAM controller back to memory mode
81 writel(0, PSRAM_FLASH_CONFIG_REG_1);
83 printf("PSRAM initialized.\n");
88 int board_mmc_init(bd_t *bis)
90 struct dwmci_host *host = NULL;
92 host = malloc(sizeof(struct dwmci_host));
94 printf("dwmci_host malloc fail!\n");
98 memset(host, 0, sizeof(struct dwmci_host));
99 host->name = "Synopsys Mobile storage";
100 host->ioaddr = SDIO_BASE;
103 host->bus_hz = 50000000;
105 add_dwmci(host, host->bus_hz / 2, 400000);
110 int board_mmc_getcd(struct mmc *mmc)
112 struct dwmci_host *host = mmc->priv;
114 return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
117 #define CREG_BASE 0xF0001000
118 #define CREG_BOOT (void *)(CREG_BASE + 0x0FF0)
119 #define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0)
120 #define CREG_IP_VERSION (void *)(CREG_BASE + 0x0FF8)
122 /* Bits in CREG_BOOT register */
123 #define CREG_BOOT_WP_BIT BIT(8)
125 void reset_cpu(ulong addr)
127 writel(1, CREG_IP_SW_RESET);
129 ; /* loop forever till reset */
132 static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
134 u32 creg_boot = readl(CREG_BOOT);
136 if (!strcmp(argv[1], "unlock"))
137 creg_boot &= ~CREG_BOOT_WP_BIT;
138 else if (!strcmp(argv[1], "lock"))
139 creg_boot |= CREG_BOOT_WP_BIT;
141 return CMD_RET_USAGE;
143 writel(creg_boot, CREG_BOOT);
145 return CMD_RET_SUCCESS;
148 cmd_tbl_t cmd_emsdp[] = {
149 U_BOOT_CMD_MKENT(rom, 2, 0, do_emsdp_rom, "", ""),
152 static int do_emsdp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
156 c = find_cmd_tbl(argv[1], cmd_emsdp, ARRAY_SIZE(cmd_emsdp));
158 /* Strip off leading 'emsdp' command */
162 if (c == NULL || argc > c->maxargs)
163 return CMD_RET_USAGE;
165 return c->cmd(cmdtp, flag, argc, argv);
169 emsdp, CONFIG_SYS_MAXARGS, 0, do_emsdp,
170 "Synopsys EMSDP specific commands",
171 "rom unlock - Unlock non-volatile memory for writing\n"
172 "emsdp rom lock - Lock non-volatile memory to prevent writing\n"
177 int version = readl(CREG_IP_VERSION);
179 printf("Board: ARC EM Software Development Platform v%d.%d\n",
180 (version >> 16) & 0xff, version & 0xff);