1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
10 DECLARE_GLOBAL_DATA_PTR;
12 #define ARC_PERIPHERAL_BASE 0xF0000000
13 #define SDIO_BASE (ARC_PERIPHERAL_BASE + 0x10000)
15 int board_mmc_init(bd_t *bis)
17 struct dwmci_host *host = NULL;
19 host = malloc(sizeof(struct dwmci_host));
21 printf("dwmci_host malloc fail!\n");
25 memset(host, 0, sizeof(struct dwmci_host));
26 host->name = "Synopsys Mobile storage";
27 host->ioaddr = (void *)SDIO_BASE;
30 host->bus_hz = 50000000;
32 add_dwmci(host, host->bus_hz / 2, 400000);
37 int board_mmc_getcd(struct mmc *mmc)
39 struct dwmci_host *host = mmc->priv;
41 return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
44 #define CREG_BASE 0xF0001000
45 #define CREG_BOOT_OFFSET 0
46 #define CREG_BOOT_WP_OFFSET 8
48 #define CGU_BASE 0xF0000000
49 #define CGU_IP_SW_RESET 0x0FF0
51 void reset_cpu(ulong addr)
53 writel(1, (u32 *)(CGU_BASE + CGU_IP_SW_RESET));
55 ; /* loop forever till reset */
58 static int do_emdk_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
60 u32 creg_boot = readl((u32 *)(CREG_BASE + CREG_BOOT_OFFSET));
62 if (!strcmp(argv[1], "unlock"))
63 creg_boot &= ~BIT(CREG_BOOT_WP_OFFSET);
64 else if (!strcmp(argv[1], "lock"))
65 creg_boot |= BIT(CREG_BOOT_WP_OFFSET);
69 writel(creg_boot, (u32 *)(CREG_BASE + CREG_BOOT_OFFSET));
71 return CMD_RET_SUCCESS;
74 cmd_tbl_t cmd_emdk[] = {
75 U_BOOT_CMD_MKENT(rom, 2, 0, do_emdk_rom, "", ""),
78 static int do_emdk(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
82 c = find_cmd_tbl(argv[1], cmd_emdk, ARRAY_SIZE(cmd_emdk));
84 /* Strip off leading 'emdk' command */
88 if (c == NULL || argc > c->maxargs)
91 return c->cmd(cmdtp, flag, argc, argv);
95 emdk, CONFIG_SYS_MAXARGS, 0, do_emdk,
96 "Synopsys EMDK specific commands",
97 "rom unlock - Unlock non-volatile memory for writing\n"
98 "emdk rom lock - Lock non-volatile memory to prevent writing\n"