3 # Note only one of these may be selected at a time! But hidden choices are
4 # not supported by Kconfig
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
11 config SUNXI_GEN_SUN6I
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
20 prompt "Sunxi SoC Variant"
24 bool "sun4i (Allwinner A10)"
26 select SUNXI_GEN_SUN4I
30 bool "sun5i (Allwinner A13)"
32 select SUNXI_GEN_SUN4I
36 bool "sun6i (Allwinner A31)"
38 select CPU_V7_HAS_NONSEC
39 select CPU_V7_HAS_VIRT
40 select SUNXI_GEN_SUN6I
42 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
45 bool "sun7i (Allwinner A20)"
47 select CPU_V7_HAS_NONSEC
48 select CPU_V7_HAS_VIRT
49 select SUNXI_GEN_SUN4I
51 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
54 bool "sun8i (Allwinner A23)"
56 select SUNXI_GEN_SUN6I
60 bool "sun8i (Allwinner A33)"
62 select SUNXI_GEN_SUN6I
66 bool "sun9i (Allwinner A80)"
68 select SUNXI_GEN_SUN6I
72 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
75 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
79 int "sunxi dram clock speed"
80 default 312 if MACH_SUN6I || MACH_SUN8I
81 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
83 Set the dram clock speed, valid range 240 - 480, must be a multiple
86 if MACH_SUN5I || MACH_SUN7I
88 int "sunxi mbus clock speed"
91 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
96 int "sunxi dram zq value"
97 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
98 default 127 if MACH_SUN7I
100 Set the dram zq value.
103 bool "sunxi dram odt enable"
104 default n if !MACH_SUN8I_A23
105 default y if MACH_SUN8I_A23
107 Select this to enable dram odt (on die termination).
109 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
111 int "sunxi dram emr1 value"
112 default 0 if MACH_SUN4I
113 default 4 if MACH_SUN5I || MACH_SUN7I
115 Set the dram controller emr1 value.
118 hex "sunxi dram tpr3 value"
121 Set the dram controller tpr3 parameter. This parameter configures
122 the delay on the command lane and also phase shifts, which are
123 applied for sampling incoming read data. The default value 0
124 means that no phase/delay adjustments are necessary. Properly
125 configuring this parameter increases reliability at high DRAM
128 config DRAM_DQS_GATING_DELAY
129 hex "sunxi dram dqs_gating_delay value"
132 Set the dram controller dqs_gating_delay parmeter. Each byte
133 encodes the DQS gating delay for each byte lane. The delay
134 granularity is 1/4 cycle. For example, the value 0x05060606
135 means that the delay is 5 quarter-cycles for one lane (1.25
136 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
137 The default value 0 means autodetection. The results of hardware
138 autodetection are not very reliable and depend on the chip
139 temperature (sometimes producing different results on cold start
140 and warm reboot). But the accuracy of hardware autodetection
141 is usually good enough, unless running at really high DRAM
142 clocks speeds (up to 600MHz). If unsure, keep as 0.
145 prompt "sunxi dram timings"
146 default DRAM_TIMINGS_VENDOR_MAGIC
148 Select the timings of the DDR3 chips.
150 config DRAM_TIMINGS_VENDOR_MAGIC
151 bool "Magic vendor timings from Android"
153 The same DRAM timings as in the Allwinner boot0 bootloader.
155 config DRAM_TIMINGS_DDR3_1066F_1333H
156 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
158 Use the timings of the standard JEDEC DDR3-1066F speed bin for
159 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
160 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
161 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
162 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
163 that down binning to DDR3-1066F is supported (because DDR3-1066F
164 uses a bit faster timings than DDR3-1333H).
166 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
167 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
169 Use the timings of the slowest possible JEDEC speed bin for the
170 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
171 DDR3-800E, DDR3-1066G or DDR3-1333J.
178 config DRAM_ODT_CORRECTION
179 int "sunxi dram odt correction value"
182 Set the dram odt correction value (range -255 - 255). In allwinner
183 fex files, this option is found in bits 8-15 of the u32 odt_en variable
184 in the [dram] section. When bit 31 of the odt_en variable is set
185 then the correction is negative. Usually the value for this is 0.
189 default 912000000 if MACH_SUN7I
190 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
192 config SYS_CONFIG_NAME
193 default "sun4i" if MACH_SUN4I
194 default "sun5i" if MACH_SUN5I
195 default "sun6i" if MACH_SUN6I
196 default "sun7i" if MACH_SUN7I
197 default "sun8i" if MACH_SUN8I
198 default "sun9i" if MACH_SUN9I
207 bool "UART0 on MicroSD breakout board"
210 Repurpose the SD card slot for getting access to the UART0 serial
211 console. Primarily useful only for low level u-boot debugging on
212 tablets, where normal UART0 is difficult to access and requires
213 device disassembly and/or soldering. As the SD card can't be used
214 at the same time, the system can be only booted in the FEL mode.
215 Only enable this if you really know what you are doing.
217 config OLD_SUNXI_KERNEL_COMPAT
218 boolean "Enable workarounds for booting old kernels"
221 Set this to enable various workarounds for old kernels, this results in
222 sub-optimal settings for newer kernels, only enable if needed.
225 string "Card detect pin for mmc0"
228 Set the card detect pin for mmc0, leave empty to not use cd. This
229 takes a string in the format understood by sunxi_name_to_gpio, e.g.
230 PH1 for pin 1 of port H.
233 string "Card detect pin for mmc1"
236 See MMC0_CD_PIN help text.
239 string "Card detect pin for mmc2"
242 See MMC0_CD_PIN help text.
245 string "Card detect pin for mmc3"
248 See MMC0_CD_PIN help text.
251 string "Pins for mmc1"
254 Set the pins used for mmc1, when applicable. This takes a string in the
255 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
258 string "Pins for mmc2"
261 See MMC1_PINS help text.
264 string "Pins for mmc3"
267 See MMC1_PINS help text.
269 config MMC_SUNXI_SLOT_EXTRA
270 int "mmc extra slot number"
273 sunxi builds always enable mmc0, some boards also have a second sdcard
274 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
277 config SPL_NAND_SUPPORT
278 bool "SPL/NAND mode support"
282 This enables support for booting from NAND internal
283 memory. U-Boot SPL doesn't detect where is it load from,
284 therefore this option is needed to properly load image from
285 flash. Option also disables MMC functionality on U-Boot due to
286 initialization errors encountered, when both controllers are
290 string "Vbus enable pin for usb0 (otg)"
293 Set the Vbus enable pin for usb0 (otg). This takes a string in the
294 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
297 string "Vbus detect pin for usb0 (otg)"
300 Set the Vbus detect pin for usb0 (otg). This takes a string in the
301 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
304 string "Vbus enable pin for usb1 (ehci0)"
305 default "PH6" if MACH_SUN4I || MACH_SUN7I
306 default "PH27" if MACH_SUN6I
308 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
309 a string in the format understood by sunxi_name_to_gpio, e.g.
310 PH1 for pin 1 of port H.
313 string "Vbus enable pin for usb2 (ehci1)"
314 default "PH3" if MACH_SUN4I || MACH_SUN7I
315 default "PH24" if MACH_SUN6I
317 See USB1_VBUS_PIN help text.
320 bool "Enable I2C/TWI controller 0"
321 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
322 default n if MACH_SUN6I || MACH_SUN8I
324 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
325 its clock and setting up the bus. This is especially useful on devices
326 with slaves connected to the bus or with pins exposed through e.g. an
327 expansion port/header.
330 bool "Enable I2C/TWI controller 1"
333 See I2C0_ENABLE help text.
336 bool "Enable I2C/TWI controller 2"
339 See I2C0_ENABLE help text.
341 if MACH_SUN6I || MACH_SUN7I
343 bool "Enable I2C/TWI controller 3"
346 See I2C0_ENABLE help text.
351 bool "Enable I2C/TWI controller 4"
354 See I2C0_ENABLE help text.
358 boolean "Enable support for gpio-s on axp PMICs"
361 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
364 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
367 Say Y here to add support for using a cfb console on the HDMI, LCD
368 or VGA output found on most sunxi devices. See doc/README.video for
369 info on how to select the video output and mode.
372 boolean "HDMI output support"
373 depends on VIDEO && !MACH_SUN8I
376 Say Y here to add support for outputting video over HDMI.
379 boolean "VGA output support"
380 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
383 Say Y here to add support for outputting video over VGA.
385 config VIDEO_VGA_VIA_LCD
386 boolean "VGA via LCD controller support"
387 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
390 Say Y here to add support for external DACs connected to the parallel
391 LCD interface driving a VGA connector, such as found on the
394 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
395 boolean "Force sync active high for VGA via LCD controller support"
396 depends on VIDEO_VGA_VIA_LCD
399 Say Y here if you've a board which uses opendrain drivers for the vga
400 hsync and vsync signals. Opendrain drivers cannot generate steep enough
401 positive edges for a stable video output, so on boards with opendrain
402 drivers the sync signals must always be active high.
404 config VIDEO_VGA_EXTERNAL_DAC_EN
405 string "LCD panel power enable pin"
406 depends on VIDEO_VGA_VIA_LCD
409 Set the enable pin for the external VGA DAC. This takes a string in the
410 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
412 config VIDEO_LCD_MODE
413 string "LCD panel timing details"
417 LCD panel timing details string, leave empty if there is no LCD panel.
418 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
419 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
421 config VIDEO_LCD_DCLK_PHASE
422 int "LCD panel display clock phase"
426 Select LCD panel display clock phase shift, range 0-3.
428 config VIDEO_LCD_POWER
429 string "LCD panel power enable pin"
433 Set the power enable pin for the LCD panel. This takes a string in the
434 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
436 config VIDEO_LCD_RESET
437 string "LCD panel reset pin"
441 Set the reset pin for the LCD panel. This takes a string in the format
442 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
444 config VIDEO_LCD_BL_EN
445 string "LCD panel backlight enable pin"
449 Set the backlight enable pin for the LCD panel. This takes a string in the
450 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
453 config VIDEO_LCD_BL_PWM
454 string "LCD panel backlight pwm pin"
458 Set the backlight pwm pin for the LCD panel. This takes a string in the
459 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
461 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
462 bool "LCD panel backlight pwm is inverted"
466 Set this if the backlight pwm output is active low.
468 config VIDEO_LCD_PANEL_I2C
469 bool "LCD panel needs to be configured via i2c"
473 Say y here if the LCD panel needs to be configured via i2c. This
474 will add a bitbang i2c controller using gpios to talk to the LCD.
476 config VIDEO_LCD_PANEL_I2C_SDA
477 string "LCD panel i2c interface SDA pin"
478 depends on VIDEO_LCD_PANEL_I2C
481 Set the SDA pin for the LCD i2c interface. This takes a string in the
482 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
484 config VIDEO_LCD_PANEL_I2C_SCL
485 string "LCD panel i2c interface SCL pin"
486 depends on VIDEO_LCD_PANEL_I2C
489 Set the SCL pin for the LCD i2c interface. This takes a string in the
490 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
493 # Note only one of these may be selected at a time! But hidden choices are
494 # not supported by Kconfig
495 config VIDEO_LCD_IF_PARALLEL
498 config VIDEO_LCD_IF_LVDS
503 prompt "LCD panel support"
506 Select which type of LCD panel to support.
508 config VIDEO_LCD_PANEL_PARALLEL
509 bool "Generic parallel interface LCD panel"
510 select VIDEO_LCD_IF_PARALLEL
512 config VIDEO_LCD_PANEL_LVDS
513 bool "Generic lvds interface LCD panel"
514 select VIDEO_LCD_IF_LVDS
516 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
517 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
518 select VIDEO_LCD_SSD2828
519 select VIDEO_LCD_IF_PARALLEL
521 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
523 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
524 bool "Hitachi tx18d42vm LCD panel"
525 select VIDEO_LCD_HITACHI_TX18D42VM
526 select VIDEO_LCD_IF_LVDS
528 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
530 config VIDEO_LCD_TL059WV5C0
531 bool "tl059wv5c0 LCD panel"
532 select VIDEO_LCD_PANEL_I2C
533 select VIDEO_LCD_IF_PARALLEL
535 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
536 Aigo M60/M608/M606 tablets.
541 config USB_MUSB_SUNXI
542 bool "Enable sunxi OTG / DRC USB controller in host mode"
545 Say y here to enable support for the sunxi OTG / DRC USB controller
546 used on almost all sunxi boards. Note currently u-boot can only have
547 one usb host controller enabled at a time, so enabling this on boards
548 which also use the ehci host controller will result in build errors.
551 boolean "Enable USB keyboard support"
554 Say Y here to add support for using a USB keyboard (typically used
555 in combination with a graphical console).
558 int "GMAC Transmit Clock Delay Chain"
561 Set the GMAC Transmit Clock Delay Chain value.
563 config SYS_MALLOC_CLEAR_ON_INIT
579 default y if !USB_MUSB_SUNXI