3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/hardware.h>
30 #include <asm/arch/spr_emi.h>
31 #include <asm/arch/spr_defs.h>
35 #define SRAM_REL 0xD2801000
37 DECLARE_GLOBAL_DATA_PTR;
41 /* Store complete RAM size and return */
42 gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
47 void dram_init_banksize(void)
49 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
50 gd->bd->bi_dram[0].size = gd->ram_size;
55 #if defined(CONFIG_CMD_NET)
58 if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
59 eth_setenv_enetaddr("ethaddr", mac_id);
61 setenv("verify", "n");
63 #if defined(CONFIG_SPEAR_USBTTY)
64 setenv("stdin", "usbtty");
65 setenv("stdout", "usbtty");
66 setenv("stderr", "usbtty");
71 #ifdef CONFIG_SPEAR_EMI
72 struct cust_emi_para {
80 /* EMI timing setting of m28w640hc of linux kernel */
81 const struct cust_emi_para emi_timing_m28w640hc = {
89 /* EMI timing setting of bootrom */
90 const struct cust_emi_para emi_timing_bootrom = {
98 void spear_emi_init(void)
100 const struct cust_emi_para *p = &emi_timing_m28w640hc;
101 struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
103 unsigned int val, tmp;
105 val = readl(CONFIG_SPEAR_RASBASE);
107 if (val & EMI_ACKMSK)
112 writel(tmp, &emi_regs_p->ack);
114 for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
115 writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
116 writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
117 writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
118 writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
119 writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
120 writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
121 &emi_regs_p->bank_regs[cs].control);
126 int spear_board_init(ulong mach_type)
128 gd->bd->bi_arch_number = mach_type;
130 /* adress of boot parameters */
131 gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
133 #ifdef CONFIG_SPEAR_EMI
139 static int i2c_read_mac(uchar *buffer)
143 i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
145 /* Check if mac in i2c memory is valid */
146 if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
147 /* Valid mac address is saved in i2c eeprom */
148 i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
155 static int write_mac(uchar *mac)
159 buf[0] = (u8)MAGIC_BYTE0;
160 buf[1] = (u8)MAGIC_BYTE1;
161 i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
163 buf[0] = (u8)~MAGIC_BYTE0;
164 buf[1] = (u8)~MAGIC_BYTE1;
166 i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
168 /* check if valid MAC address is saved in I2C EEPROM or not? */
169 if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
170 i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
171 puts("I2C EEPROM written with mac address \n");
175 puts("I2C EEPROM writing failed \n");
179 int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
181 void (*sram_setfreq) (unsigned int, unsigned int);
182 unsigned char mac[6];
183 unsigned int reg, frequency;
187 if ((argc > 3) || (argc < 2))
188 return cmd_usage(cmdtp);
190 if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
192 frequency = simple_strtoul(argv[2], NULL, 0);
194 if (frequency > 333) {
195 printf("Frequency is limited to 333MHz\n");
199 sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
201 if (!strcmp(argv[1], "cpufreq")) {
202 sram_setfreq(CPU, frequency);
203 printf("CPU frequency changed to %u\n", frequency);
205 sram_setfreq(DDR, frequency);
206 printf("DDR frequency changed to %u\n", frequency);
210 } else if (!strcmp(argv[1], "ethaddr")) {
213 for (reg = 0; reg < 6; ++reg) {
214 mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
216 s = (*e) ? e + 1 : e;
221 } else if (!strcmp(argv[1], "print")) {
222 if (!i2c_read_mac(mac)) {
223 sprintf(i2c_mac, "%pM", mac);
224 printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
226 printf("Ethaddr (from i2c mem) = Not set\n");
232 return cmd_usage(cmdtp);
235 U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
237 "chip_config cpufreq/ddrfreq frequency\n"
238 "chip_config print");