3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 /* ------------------------------------------------------------------------- */
35 #if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
39 #elif FCLK_SPEED==1 /* Fout = 202.8MHz */
57 static inline void delay (unsigned long loops)
59 __asm__ volatile ("1:\n"
61 "bne 1b":"=r" (loops):"0" (loops));
65 * Miscellaneous platform dependent initialisations
70 DECLARE_GLOBAL_DATA_PTR;
72 /* to reduce PLL lock time, adjust the LOCKTIME register */
76 rMPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
78 /* some delay between MPLL and UPLL */
82 rUPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
84 /* some delay between MPLL and UPLL */
87 /* set up the I/O ports */
101 rGPHCON = 0x002AFAAA;
104 /* arch number of SMDK2410-Board */
105 gd->bd->bi_arch_number = 193;
107 /* adress of boot parameters */
108 gd->bd->bi_boot_params = 0x30000100;
118 DECLARE_GLOBAL_DATA_PTR;
120 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
121 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;