3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
29 /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
30 * has nothing to do with the flash chip being 8-bit or 16-bit.
32 #ifdef CONFIG_FLASH_16BIT
33 typedef unsigned short FLASH_PORT_WIDTH;
34 typedef volatile unsigned short FLASH_PORT_WIDTHV;
35 #define FLASH_ID_MASK 0xFFFF
37 typedef unsigned long FLASH_PORT_WIDTH;
38 typedef volatile unsigned long FLASH_PORT_WIDTHV;
39 #define FLASH_ID_MASK 0xFFFFFFFF
42 #define FPW FLASH_PORT_WIDTH
43 #define FPWV FLASH_PORT_WIDTHV
45 #define ORMASK(size) ((-size) & OR_AM_MSK)
47 /*-----------------------------------------------------------------------
50 static ulong flash_get_size(FPWV *addr, flash_info_t *info);
51 static void flash_reset(flash_info_t *info);
52 static int write_word_intel(flash_info_t *info, FPWV *dest, FPW data);
53 static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
54 static void flash_get_offsets(ulong base, flash_info_t *info);
55 #ifdef CFG_FLASH_PROTECTION
56 static void flash_sync_real_protect(flash_info_t *info);
59 /*-----------------------------------------------------------------------
62 * sets up flash_info and returns size of FLASH (bytes)
64 unsigned long flash_init (void)
66 volatile immap_t *immap = (immap_t *)CFG_IMMR;
67 volatile memctl8xx_t *memctl = &immap->im_memctl;
71 /* Init: no FLASHes known */
72 for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
73 flash_info[i].flash_id = FLASH_UNKNOWN;
76 size_b = flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
78 flash_info[0].size = size_b;
80 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
81 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx\n",size_b);
84 /* Remap FLASH according to real size, so only at proper address */
85 memctl->memc_or0 = (memctl->memc_or0 & ~OR_AM_MSK) | ORMASK(size_b);
87 /* Do this again (was done already in flast_get_size), just
88 * in case we move it when remap the FLASH.
90 flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
92 #ifdef CFG_FLASH_PROTECTION
93 /* read the hardware protection status (if any) into the
94 * protection array in flash_info.
96 flash_sync_real_protect(&flash_info[0]);
99 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
100 /* monitor protection ON by default */
101 flash_protect(FLAG_PROTECT_SET,
103 CFG_MONITOR_BASE+monitor_flash_len-1,
110 /*-----------------------------------------------------------------------
112 static void flash_reset(flash_info_t *info)
114 FPWV *base = (FPWV *)(info->start[0]);
116 /* Put FLASH back in read mode */
117 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
118 *base = (FPW)0x00FF00FF; /* Intel Read Mode */
119 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
120 *base = (FPW)0x00F000F0; /* AMD Read Mode */
123 /*-----------------------------------------------------------------------
125 static void flash_get_offsets (ulong base, flash_info_t *info)
129 /* set up sector start address table */
130 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
131 && (info->flash_id & FLASH_BTYPE)) {
132 int bootsect_size; /* number of bytes/boot sector */
133 int sect_size; /* number of bytes/regular sector */
135 bootsect_size = 0x00002000 * (sizeof(FPW)/2);
136 sect_size = 0x00010000 * (sizeof(FPW)/2);
138 /* set sector offsets for bottom boot block type */
139 for (i = 0; i < 8; ++i) {
140 info->start[i] = base + (i * bootsect_size);
142 for (i = 8; i < info->sector_count; i++) {
143 info->start[i] = base + ((i - 7) * sect_size);
146 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
147 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
149 int sect_size; /* number of bytes/sector */
151 sect_size = 0x00010000 * (sizeof(FPW)/2);
153 /* set up sector start address table (uniform sector type) */
154 for( i = 0; i < info->sector_count; i++ )
155 info->start[i] = base + (i * sect_size);
159 /*-----------------------------------------------------------------------
162 void flash_print_info (flash_info_t *info)
168 uchar botbootletter[] = "B";
169 uchar topbootletter[] = "T";
170 uchar botboottype[] = "bottom boot sector";
171 uchar topboottype[] = "top boot sector";
173 if (info->flash_id == FLASH_UNKNOWN) {
174 printf ("missing or unknown FLASH type\n");
178 switch (info->flash_id & FLASH_VENDMASK) {
179 case FLASH_MAN_AMD: printf ("AMD "); break;
180 case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
181 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
182 case FLASH_MAN_SST: printf ("SST "); break;
183 case FLASH_MAN_STM: printf ("STM "); break;
184 case FLASH_MAN_INTEL: printf ("INTEL "); break;
185 default: printf ("Unknown Vendor "); break;
188 /* check for top or bottom boot, if it applies */
189 if (info->flash_id & FLASH_BTYPE) {
190 boottype = botboottype;
191 bootletter = botbootletter;
194 boottype = topboottype;
195 bootletter = topbootletter;
198 switch (info->flash_id & FLASH_TYPEMASK) {
200 fmt = "29LV641D (64 Mbit, uniform sectors)\n";
202 case FLASH_28F800C3B:
203 case FLASH_28F800C3T:
204 fmt = "28F800C3%s (8 Mbit, %s)\n";
206 case FLASH_INTEL800B:
207 case FLASH_INTEL800T:
208 fmt = "28F800B3%s (8 Mbit, %s)\n";
210 case FLASH_28F160C3B:
211 case FLASH_28F160C3T:
212 fmt = "28F160C3%s (16 Mbit, %s)\n";
214 case FLASH_INTEL160B:
215 case FLASH_INTEL160T:
216 fmt = "28F160B3%s (16 Mbit, %s)\n";
218 case FLASH_28F320C3B:
219 case FLASH_28F320C3T:
220 fmt = "28F320C3%s (32 Mbit, %s)\n";
222 case FLASH_INTEL320B:
223 case FLASH_INTEL320T:
224 fmt = "28F320B3%s (32 Mbit, %s)\n";
226 case FLASH_28F640C3B:
227 case FLASH_28F640C3T:
228 fmt = "28F640C3%s (64 Mbit, %s)\n";
230 case FLASH_INTEL640B:
231 case FLASH_INTEL640T:
232 fmt = "28F640B3%s (64 Mbit, %s)\n";
235 fmt = "Unknown Chip Type\n";
239 printf (fmt, bootletter, boottype);
241 printf (" Size: %ld MB in %d Sectors\n",
245 printf (" Sector Start Addresses:");
247 for (i=0; i<info->sector_count; ++i) {
252 printf (" %08lX%s", info->start[i],
253 info->protect[i] ? " (RO)" : " ");
259 /*-----------------------------------------------------------------------
263 * The following code cannot be run from FLASH!
266 ulong flash_get_size (FPWV *addr, flash_info_t *info)
268 /* Write auto select command: read Manufacturer ID */
270 /* Write auto select command sequence and test FLASH answer */
271 addr[0x0555] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
272 addr[0x02AA] = (FPW)0x00550055; /* for AMD, Intel ignores this */
273 addr[0x0555] = (FPW)0x00900090; /* selects Intel or AMD */
275 /* The manufacturer codes are only 1 byte, so just use 1 byte.
276 * This works for any bus width and any FLASH device width.
278 switch (addr[0] & 0xff) {
280 case (uchar)AMD_MANUFACT:
281 info->flash_id = FLASH_MAN_AMD;
284 case (uchar)INTEL_MANUFACT:
285 info->flash_id = FLASH_MAN_INTEL;
289 info->flash_id = FLASH_UNKNOWN;
290 info->sector_count = 0;
295 /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
296 if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
298 case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
299 info->flash_id += FLASH_AM640U;
300 info->sector_count = 128;
301 info->size = 0x00800000 * (sizeof(FPW)/2);
302 break; /* => 8 or 16 MB */
304 case (FPW)INTEL_ID_28F800C3B:
305 info->flash_id += FLASH_28F800C3B;
306 info->sector_count = 23;
307 info->size = 0x00100000 * (sizeof(FPW)/2);
308 break; /* => 1 or 2 MB */
310 case (FPW)INTEL_ID_28F800B3B:
311 info->flash_id += FLASH_INTEL800B;
312 info->sector_count = 23;
313 info->size = 0x00100000 * (sizeof(FPW)/2);
314 break; /* => 1 or 2 MB */
316 case (FPW)INTEL_ID_28F160C3B:
317 info->flash_id += FLASH_28F160C3B;
318 info->sector_count = 39;
319 info->size = 0x00200000 * (sizeof(FPW)/2);
320 break; /* => 2 or 4 MB */
322 case (FPW)INTEL_ID_28F160B3B:
323 info->flash_id += FLASH_INTEL160B;
324 info->sector_count = 39;
325 info->size = 0x00200000 * (sizeof(FPW)/2);
326 break; /* => 2 or 4 MB */
328 case (FPW)INTEL_ID_28F320C3B:
329 info->flash_id += FLASH_28F320C3B;
330 info->sector_count = 71;
331 info->size = 0x00400000 * (sizeof(FPW)/2);
332 break; /* => 4 or 8 MB */
334 case (FPW)INTEL_ID_28F320B3B:
335 info->flash_id += FLASH_INTEL320B;
336 info->sector_count = 71;
337 info->size = 0x00400000 * (sizeof(FPW)/2);
338 break; /* => 4 or 8 MB */
340 case (FPW)INTEL_ID_28F640C3B:
341 info->flash_id += FLASH_28F640C3B;
342 info->sector_count = 135;
343 info->size = 0x00800000 * (sizeof(FPW)/2);
344 break; /* => 8 or 16 MB */
346 case (FPW)INTEL_ID_28F640B3B:
347 info->flash_id += FLASH_INTEL640B;
348 info->sector_count = 135;
349 info->size = 0x00800000 * (sizeof(FPW)/2);
350 break; /* => 8 or 16 MB */
353 info->flash_id = FLASH_UNKNOWN;
354 info->sector_count = 0;
356 return (0); /* => no or unknown flash */
359 flash_get_offsets((ulong)addr, info);
361 /* Put FLASH back in read mode */
367 #ifdef CFG_FLASH_PROTECTION
368 /*-----------------------------------------------------------------------
371 static void flash_sync_real_protect(flash_info_t *info)
373 FPWV *addr = (FPWV *)(info->start[0]);
377 switch (info->flash_id & FLASH_TYPEMASK) {
378 case FLASH_28F800C3B:
379 case FLASH_28F800C3T:
380 case FLASH_28F160C3B:
381 case FLASH_28F160C3T:
382 case FLASH_28F320C3B:
383 case FLASH_28F320C3T:
384 case FLASH_28F640C3B:
385 case FLASH_28F640C3T:
386 /* check for protected sectors */
387 *addr = (FPW)0x00900090;
388 for (i = 0; i < info->sector_count; i++) {
389 /* read sector protection at sector address, (A7 .. A0) = 0x02.
390 * D0 = 1 for each device if protected.
391 * If at least one device is protected the sector is marked
392 * protected, but mixed protected and unprotected devices
393 * within a sector should never happen.
395 sect = (FPWV *)(info->start[i]);
396 info->protect[i] = (sect[2] & (FPW)(0x00010001)) ? 1 : 0;
399 /* Put FLASH back in read mode */
405 /* no hardware protect that we support */
411 /*-----------------------------------------------------------------------
414 int flash_erase (flash_info_t *info, int s_first, int s_last)
417 int flag, prot, sect;
418 int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
419 ulong start, now, last;
422 if ((s_first < 0) || (s_first > s_last)) {
423 if (info->flash_id == FLASH_UNKNOWN) {
424 printf ("- missing\n");
426 printf ("- no sectors to erase\n");
431 switch (info->flash_id & FLASH_TYPEMASK) {
432 case FLASH_INTEL800B:
433 case FLASH_INTEL160B:
434 case FLASH_INTEL320B:
435 case FLASH_INTEL640B:
436 case FLASH_28F800C3B:
437 case FLASH_28F160C3B:
438 case FLASH_28F320C3B:
439 case FLASH_28F640C3B:
444 printf ("Can't erase unknown flash type %08lx - aborted\n",
450 for (sect=s_first; sect<=s_last; ++sect) {
451 if (info->protect[sect]) {
457 printf ("- Warning: %d protected sectors will not be erased!\n",
463 start = get_timer(0);
466 /* Start erase on unprotected sectors */
467 for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
469 if (info->protect[sect] != 0) /* protected, skip it */
472 /* Disable interrupts which might cause a timeout here */
473 flag = disable_interrupts();
475 addr = (FPWV *)(info->start[sect]);
477 *addr = (FPW)0x00500050; /* clear status register */
478 *addr = (FPW)0x00200020; /* erase setup */
479 *addr = (FPW)0x00D000D0; /* erase confirm */
482 /* must be AMD style if not Intel */
483 FPWV *base; /* first address in bank */
485 base = (FPWV *)(info->start[0]);
486 base[0x0555] = (FPW)0x00AA00AA; /* unlock */
487 base[0x02AA] = (FPW)0x00550055; /* unlock */
488 base[0x0555] = (FPW)0x00800080; /* erase mode */
489 base[0x0555] = (FPW)0x00AA00AA; /* unlock */
490 base[0x02AA] = (FPW)0x00550055; /* unlock */
491 *addr = (FPW)0x00300030; /* erase sector */
494 /* re-enable interrupts if necessary */
498 /* wait at least 50us for AMD, 80us for Intel.
503 while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
504 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
505 printf ("Timeout\n");
509 *addr = (FPW)0x00B000B0;
512 flash_reset(info); /* reset to read mode */
513 rcode = 1; /* failed */
517 /* show that we're waiting */
518 if ((now - last) > 1000) { /* every second */
524 flash_reset(info); /* reset to read mode */
531 /*-----------------------------------------------------------------------
532 * Copy memory to flash, returns:
535 * 2 - Flash not erased
537 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
539 FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
540 int bytes; /* number of bytes to program in current word */
541 int left; /* number of bytes left to program */
544 for (left = cnt, res = 0;
545 left > 0 && res == 0;
546 addr += sizeof(data), left -= sizeof(data) - bytes) {
548 bytes = addr & (sizeof(data) - 1);
549 addr &= ~(sizeof(data) - 1);
551 /* combine source and destination data so can program
552 * an entire word of 16 or 32 bits
554 for (i = 0; i < sizeof(data); i++) {
556 if (i < bytes || i - bytes >= left )
557 data += *((uchar *)addr + i);
562 /* write one word to the flash */
563 switch (info->flash_id & FLASH_VENDMASK) {
565 res = write_word_amd(info, (FPWV *)addr, data);
567 case FLASH_MAN_INTEL:
568 res = write_word_intel(info, (FPWV *)addr, data);
571 /* unknown flash type, error! */
572 printf ("missing or unknown FLASH type\n");
573 res = 1; /* not really a timeout, but gives error */
581 /*-----------------------------------------------------------------------
582 * Write a word to Flash for AMD FLASH
583 * A word is 16 or 32 bits, whichever the bus width of the flash bank
584 * (not an individual chip) is.
589 * 2 - Flash not erased
591 static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
595 int res = 0; /* result, assume success */
596 FPWV *base; /* first address in flash bank */
598 /* Check if Flash is (sufficiently) erased */
599 if ((*dest & data) != data) {
604 base = (FPWV *)(info->start[0]);
606 /* Disable interrupts which might cause a timeout here */
607 flag = disable_interrupts();
609 base[0x0555] = (FPW)0x00AA00AA; /* unlock */
610 base[0x02AA] = (FPW)0x00550055; /* unlock */
611 base[0x0555] = (FPW)0x00A000A0; /* selects program mode */
613 *dest = data; /* start programming the data */
615 /* re-enable interrupts if necessary */
619 start = get_timer (0);
621 /* data polling for D7 */
622 while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
623 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
624 *dest = (FPW)0x00F000F0; /* reset bank */
632 /*-----------------------------------------------------------------------
633 * Write a word to Flash for Intel FLASH
634 * A word is 16 or 32 bits, whichever the bus width of the flash bank
635 * (not an individual chip) is.
640 * 2 - Flash not erased
642 static int write_word_intel (flash_info_t *info, FPWV *dest, FPW data)
646 int res = 0; /* result, assume success */
648 /* Check if Flash is (sufficiently) erased */
649 if ((*dest & data) != data) {
653 /* Disable interrupts which might cause a timeout here */
654 flag = disable_interrupts();
656 *dest = (FPW)0x00500050; /* clear status register */
657 *dest = (FPW)0x00FF00FF; /* make sure in read mode */
658 *dest = (FPW)0x00400040; /* program setup */
660 *dest = data; /* start programming the data */
662 /* re-enable interrupts if necessary */
666 start = get_timer (0);
668 while (res == 0 && (*dest & (FPW)0x00800080) != (FPW)0x00800080) {
669 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
670 *dest = (FPW)0x00B000B0; /* Suspend program */
675 if (res == 0 && (*dest & (FPW)0x00100010))
676 res = 1; /* write failed, time out error is close enough */
678 *dest = (FPW)0x00500050; /* clear status register */
679 *dest = (FPW)0x00FF00FF; /* make sure in read mode */
684 #ifdef CFG_FLASH_PROTECTION
685 /*-----------------------------------------------------------------------
687 int flash_real_protect (flash_info_t * info, long sector, int prot)
689 int rcode = 0; /* assume success */
690 FPWV *addr; /* address of sector */
693 addr = (FPWV *) (info->start[sector]);
695 switch (info->flash_id & FLASH_TYPEMASK) {
696 case FLASH_28F800C3B:
697 case FLASH_28F800C3T:
698 case FLASH_28F160C3B:
699 case FLASH_28F160C3T:
700 case FLASH_28F320C3B:
701 case FLASH_28F320C3T:
702 case FLASH_28F640C3B:
703 case FLASH_28F640C3T:
704 flash_reset (info); /* make sure in read mode */
705 *addr = (FPW) 0x00600060L; /* lock command setup */
707 *addr = (FPW) 0x00010001L; /* lock sector */
709 *addr = (FPW) 0x00D000D0L; /* unlock sector */
710 flash_reset (info); /* reset to read mode */
712 /* now see if it really is locked/unlocked as requested */
713 *addr = (FPW) 0x00900090;
714 /* read sector protection at sector address, (A7 .. A0) = 0x02.
715 * D0 = 1 for each device if protected.
716 * If at least one device is protected the sector is marked
717 * protected, but return failure. Mixed protected and
718 * unprotected devices within a sector should never happen.
720 value = addr[2] & (FPW) 0x00010001;
722 info->protect[sector] = 0;
723 else if (value == (FPW) 0x00010001)
724 info->protect[sector] = 1;
726 /* error, mixed protected and unprotected */
728 info->protect[sector] = 1;
730 if (info->protect[sector] != prot)
731 rcode = 1; /* failed to protect/unprotect as requested */
733 /* reload all protection bits from hardware for now */
734 flash_sync_real_protect (info);
739 /* no hardware protect that we support */
740 info->protect[sector] = prot;