1 // SPDX-License-Identifier: GPL-2.0+
3 * pci.c -- WindRiver SBC8349 PCI board support.
4 * Copyright (c) 2006 Wind River Systems, Inc.
5 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
7 * Based on MPC8349 PCI support but w/o PIB related code.
17 #include <asm/fsl_i2c.h>
19 static struct pci_region pci1_regions[] = {
21 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
22 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
23 size: CONFIG_SYS_PCI1_MEM_SIZE,
24 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
27 bus_start: CONFIG_SYS_PCI1_IO_BASE,
28 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
29 size: CONFIG_SYS_PCI1_IO_SIZE,
33 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
34 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
35 size: CONFIG_SYS_PCI1_MMIO_SIZE,
43 * NOTICE: PCI2 is not supported. There is only one
44 * physical PCI slot on the board.
50 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
51 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
52 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
53 struct pci_region *reg[] = { pci1_regions };
55 /* Enable all 8 PCI_CLK_OUTPUTS */
56 clk->occr = 0xff000000;
59 /* Configure PCI Local Access Windows */
60 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
61 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
63 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
64 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
68 mpc83xx_pci_init(1, reg);