2 * Copyright (C) 2011 Samsung Electronics
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/cpu.h>
27 #include <asm/arch/gpio.h>
28 #include <asm/arch/mmc.h>
29 #include <asm/arch/periph.h>
30 #include <asm/arch/pinmux.h>
31 #include <asm/arch/sromc.h>
33 DECLARE_GLOBAL_DATA_PTR;
34 struct exynos4_gpio_part1 *gpio1;
35 struct exynos4_gpio_part2 *gpio2;
37 static void smc9115_pre_init(void)
39 u32 smc_bw_conf, smc_bc_conf;
41 /* gpio configuration GPK0CON */
42 s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
44 /* Ethernet needs bus width of 16 bits */
45 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
46 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
47 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
48 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
51 /* Select and configure the SROMC bank */
52 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
57 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
58 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
62 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
68 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
69 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
70 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
71 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
76 void dram_init_banksize(void)
78 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
79 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
81 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
82 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
84 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
85 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
87 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
88 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
92 int board_eth_init(bd_t *bis)
96 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
101 #ifdef CONFIG_DISPLAY_BOARDINFO
104 printf("\nBoard: SMDKV310\n");
109 #ifdef CONFIG_GENERIC_MMC
110 int board_mmc_init(bd_t *bis)
117 * GPK2[0] SD_2_CLK(2)
118 * GPK2[1] SD_2_CMD(2)
120 * GPK2[3:6] SD_2_DATA[0:3](2)
122 for (i = 0; i < 7; i++) {
123 /* GPK2[0:6] special function 2 */
124 s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
126 /* GPK2[0:6] drv 4x */
127 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
129 /* GPK2[0:1] pull disable */
130 if (i == 0 || i == 1) {
131 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
135 /* GPK2[2:6] pull up */
136 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
138 err = s5p_mmc_init(2, 4);
143 static int board_uart_init(void)
147 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
149 debug("UART0 not configured\n");
153 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
155 debug("UART1 not configured\n");
159 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
161 debug("UART2 not configured\n");
165 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
167 debug("UART3 not configured\n");
174 #ifdef CONFIG_BOARD_EARLY_INIT_F
175 int board_early_init_f(void)
178 err = board_uart_init();
180 debug("UART init failed\n");