board/samsung/common/exynos5-dt.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2012 Samsung Electronics
   4  */
   5
   6 #include <common.h>
   7 #include <dm.h>
   8 #include <dwc3-uboot.h>
   9 #include <fdtdec.h>
  10 #include <asm/io.h>
  11 #include <errno.h>
  12 #include <i2c.h>
  13 #include <mmc.h>
  14 #include <netdev.h>
  15 #include <samsung-usb-phy-uboot.h>
  16 #include <spi.h>
  17 #include <usb.h>
  18 #include <video_bridge.h>
  19 #include <asm/gpio.h>
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/dwmmc.h>
  22 #include <asm/arch/mmc.h>
  23 #include <asm/arch/pinmux.h>
  24 #include <asm/arch/power.h>
  25 #include <asm/arch/sromc.h>
  26 #include <power/pmic.h>
  27 #include <power/max77686_pmic.h>
  28 #include <power/regulator.h>
  29 #include <power/s2mps11.h>
  30 #include <power/s5m8767.h>
  31 #include <samsung/exynos5-dt-types.h>
  32 #include <samsung/misc.h>
  33 #include <tmu.h>
  34
  35 DECLARE_GLOBAL_DATA_PTR;
  36
  37 int exynos_init(void)
  38 {
  39         return 0;
  40 }
  41
  42 static int exynos_set_regulator(const char *name, uint uv)
  43 {
  44         struct udevice *dev;
  45         int ret;
  46
  47         ret = regulator_get_by_platname(name, &dev);
  48         if (ret) {
  49                 debug("%s: Cannot find regulator %s\n", __func__, name);
  50                 return ret;
  51         }
  52         ret = regulator_set_value(dev, uv);
  53         if (ret) {
  54                 debug("%s: Cannot set regulator %s\n", __func__, name);
  55                 return ret;
  56         }
  57
  58         return 0;
  59 }
  60
  61 int exynos_power_init(void)
  62 {
  63         struct udevice *dev;
  64         int ret;
  65
  66 #ifdef CONFIG_PMIC_S2MPS11
  67         ret = pmic_get("s2mps11_pmic", &dev);
  68 #else
  69         ret = pmic_get("max77686", &dev);
  70         if (!ret) {
  71                 /* TODO(sjg@chromium.org): Move into the clock/pmic API */
  72                 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
  73                                 MAX77686_32KHCP_EN);
  74                 if (ret)
  75                         return ret;
  76                 ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
  77                                 MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
  78                 if (ret)
  79                         return ret;
  80         } else {
  81                 ret = pmic_get("s5m8767-pmic", &dev);
  82                 /* TODO(sjg@chromium.org): Use driver model to access clock */
  83 #ifdef CONFIG_PMIC_S5M8767
  84                 if (!ret)
  85                         s5m8767_enable_32khz_cp(dev);
  86 #endif
  87         }
  88 #endif  /* CONFIG_PMIC_S2MPS11 */
  89         if (ret == -ENODEV)
  90                 return 0;
  91
  92         ret = regulators_enable_boot_on(false);
  93         if (ret)
  94                 return ret;
  95
  96         ret = exynos_set_regulator("vdd_mif", 1100000);
  97         if (ret)
  98                 return ret;
  99
 100         ret = exynos_set_regulator("vdd_arm", 1300000);
 101         if (ret)
 102                 return ret;
 103         ret = exynos_set_regulator("vdd_int", 1012500);
 104         if (ret)
 105                 return ret;
 106         ret = exynos_set_regulator("vdd_g3d", 1200000);
 107         if (ret)
 108                 return ret;
 109
 110         return 0;
 111 }
 112
 113 int board_get_revision(void)
 114 {
 115         return 0;
 116 }
 117
 118 #ifdef CONFIG_USB_DWC3
 119 static struct dwc3_device dwc3_device_data = {
 120         .maximum_speed = USB_SPEED_SUPER,
 121         .base = 0x12400000,
 122         .dr_mode = USB_DR_MODE_PERIPHERAL,
 123         .index = 0,
 124 };
 125
 126 int usb_gadget_handle_interrupts(void)
 127 {
 128         dwc3_uboot_handle_interrupt(0);
 129         return 0;
 130 }
 131
 132 int board_usb_init(int index, enum usb_init_type init)
 133 {
 134         struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
 135                 samsung_get_base_usb3_phy();
 136
 137         if (!phy) {
 138                 pr_err("usb3 phy not supported\n");
 139                 return -ENODEV;
 140         }
 141
 142         set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
 143         exynos5_usb3_phy_init(phy);
 144
 145         return dwc3_uboot_init(&dwc3_device_data);
 146 }
 147 #endif
 148 #ifdef CONFIG_SET_DFU_ALT_INFO
 149 char *get_dfu_alt_system(char *interface, char *devstr)
 150 {
 151         char *info = "Not supported!";
 152
 153         if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2())
 154                 return info;
 155
 156         return env_get("dfu_alt_system");
 157 }
 158
 159 char *get_dfu_alt_boot(char *interface, char *devstr)
 160 {
 161         char *info = "Not supported!";
 162         struct mmc *mmc;
 163         char *alt_boot;
 164         int dev_num;
 165
 166         if (board_is_odroidxu4() || board_is_odroidhc1() || board_is_odroidhc2())
 167                 return info;
 168
 169         dev_num = simple_strtoul(devstr, NULL, 10);
 170
 171         mmc = find_mmc_device(dev_num);
 172         if (!mmc)
 173                 return NULL;
 174
 175         if (mmc_init(mmc))
 176                 return NULL;
 177
 178         if (IS_SD(mmc))
 179                 alt_boot = CONFIG_DFU_ALT_BOOT_SD;
 180         else
 181                 alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
 182
 183         return alt_boot;
 184 }
 185 #endif