2 * (C) Copyright 2013 SAMSUNG Electronics
3 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
5 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/board.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/dwmmc.h>
20 #include <asm/arch/mmc.h>
21 #include <asm/arch/pinmux.h>
22 #include <asm/arch/power.h>
23 #include <asm/arch/system.h>
24 #include <asm/arch/sromc.h>
28 #include <dwc3-uboot.h>
29 #include <samsung/misc.h>
30 #include <dm/pinctrl.h>
33 DECLARE_GLOBAL_DATA_PTR;
35 __weak int exynos_early_init_f(void)
40 __weak int exynos_power_init(void)
45 #if defined CONFIG_EXYNOS_TMU
46 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
47 static void boot_temp_check(void)
51 switch (tmu_monitor(&temp)) {
52 case TMU_STATUS_NORMAL:
54 case TMU_STATUS_TRIPPED:
56 * Status TRIPPED ans WARNING means corresponding threshold
59 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
63 case TMU_STATUS_WARNING:
64 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
68 * TMU_STATUS_INIT means something is wrong with temperature
69 * sensing and TMU status was changed back from NORMAL to INIT.
71 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
74 debug("EXYNOS_TMU: Unknown TMU state\n");
81 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
82 #if defined CONFIG_EXYNOS_TMU
83 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
84 debug("%s: Failed to init TMU\n", __func__);
89 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
90 /* The last few MB of memory can be reserved for secure firmware */
91 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
94 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
104 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
105 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
106 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
111 int dram_init_banksize(void)
114 unsigned long addr, size;
116 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
117 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
118 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
120 gd->bd->bi_dram[i].start = addr;
121 gd->bd->bi_dram[i].size = size;
127 static int board_uart_init(void)
129 #ifndef CONFIG_PINCTRL_EXYNOS
130 int err, uart_id, ret = 0;
132 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
133 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
135 debug("UART%d not configured\n",
136 (uart_id - PERIPH_ID_UART0));
146 #ifdef CONFIG_BOARD_EARLY_INIT_F
147 int board_early_init_f(void)
150 #ifdef CONFIG_BOARD_TYPES
153 err = board_uart_init();
155 debug("UART init failed\n");
159 #ifdef CONFIG_SYS_I2C_INIT_BOARD
160 board_i2c_init(gd->fdt_blob);
163 return exynos_early_init_f();
167 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
168 int power_init_board(void)
172 return exynos_power_init();
176 #ifdef CONFIG_SMC911X
177 static int decode_sromc(const void *blob, struct fdt_sromc *config)
182 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
184 debug("Could not find SROMC node\n");
188 config->bank = fdtdec_get_int(blob, node, "bank", 0);
189 config->width = fdtdec_get_int(blob, node, "width", 2);
191 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
192 FDT_SROM_TIMING_COUNT);
194 debug("Could not decode SROMC configuration Error: %s\n",
196 return -FDT_ERR_NOTFOUND;
202 int board_eth_init(bd_t *bis)
204 #ifdef CONFIG_SMC911X
205 u32 smc_bw_conf, smc_bc_conf;
206 struct fdt_sromc config;
207 fdt_addr_t base_addr;
210 node = decode_sromc(gd->fdt_blob, &config);
212 debug("%s: Could not find sromc configuration\n", __func__);
215 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
217 debug("%s: Could not find lan9215 configuration\n", __func__);
221 /* We now have a node, so any problems from now on are errors */
222 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
223 if (base_addr == FDT_ADDR_T_NONE) {
224 debug("%s: Could not find lan9215 address\n", __func__);
228 /* Ethernet needs data bus width of 16 bits */
229 if (config.width != 2) {
230 debug("%s: Unsupported bus width %d\n", __func__,
234 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
235 | SROMC_BYTE_ENABLE(config.bank);
237 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
238 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
239 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
240 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
241 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
242 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
243 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
245 /* Select and configure the SROMC bank */
246 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
247 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
248 return smc911x_initialize(0, base_addr);
253 #ifdef CONFIG_GENERIC_MMC
254 static int init_mmc(void)
256 #ifdef CONFIG_MMC_SDHCI
257 return exynos_mmc_init(gd->fdt_blob);
263 static int init_dwmmc(void)
266 return exynos_dwmmc_init(gd->fdt_blob);
272 int board_mmc_init(bd_t *bis)
276 if (get_boot_mode() == BOOT_MODE_SD) {
285 debug("mmc init failed\n");
291 #ifdef CONFIG_DISPLAY_BOARDINFO
294 const char *board_info;
296 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
297 printf("Board: %s\n", board_info ? board_info : "unknown");
298 #ifdef CONFIG_BOARD_TYPES
299 board_info = get_board_type();
301 printf("Type: %s\n", board_info);
307 #ifdef CONFIG_BOARD_LATE_INIT
308 int board_late_init(void)
310 stdio_print_current_devices();
312 if (cros_ec_get_error()) {
313 /* Force console on */
314 gd->flags &= ~GD_FLG_SILENT;
316 printf("cros-ec communications failure %d\n",
317 cros_ec_get_error());
318 puts("\nPlease reset with Power+Refresh\n\n");
319 panic("Cannot init cros-ec device");
326 #ifdef CONFIG_MISC_INIT_R
327 int misc_init_r(void)
329 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
332 #ifdef CONFIG_LCD_MENU
336 #ifdef CONFIG_CMD_BMP
337 if (panel_info.logo_on)
344 void reset_misc(void)
346 struct gpio_desc gpio = {};
349 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
350 "samsung,emmc-reset");
354 gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio,
357 if (dm_gpio_is_valid(&gpio)) {
361 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
362 * required by 'JEDEC Standard No.84-A441' (eMMC)
363 * document but real delay time is expected to greater
366 dm_gpio_set_value(&gpio, 0);
368 dm_gpio_set_value(&gpio, 1);
372 int board_usb_cleanup(int index, enum usb_init_type init)
374 #ifdef CONFIG_USB_DWC3
375 dwc3_uboot_exit(index);