2 * (C) Copyright 2013 SAMSUNG Electronics
3 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
5 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/board.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/dwmmc.h>
20 #include <asm/arch/mmc.h>
21 #include <asm/arch/pinmux.h>
22 #include <asm/arch/power.h>
23 #include <asm/arch/system.h>
24 #include <asm/arch/sromc.h>
28 #include <dwc3-uboot.h>
29 #include <samsung/misc.h>
31 DECLARE_GLOBAL_DATA_PTR;
33 __weak int exynos_early_init_f(void)
38 __weak int exynos_power_init(void)
43 #if defined CONFIG_EXYNOS_TMU
44 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
45 static void boot_temp_check(void)
49 switch (tmu_monitor(&temp)) {
50 case TMU_STATUS_NORMAL:
52 case TMU_STATUS_TRIPPED:
54 * Status TRIPPED ans WARNING means corresponding threshold
57 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
61 case TMU_STATUS_WARNING:
62 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
66 * TMU_STATUS_INIT means something is wrong with temperature
67 * sensing and TMU status was changed back from NORMAL to INIT.
69 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
72 debug("EXYNOS_TMU: Unknown TMU state\n");
79 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
80 #if defined CONFIG_EXYNOS_TMU
81 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
82 debug("%s: Failed to init TMU\n", __func__);
87 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
88 /* The last few MB of memory can be reserved for secure firmware */
89 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
92 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
102 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
103 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
104 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
109 void dram_init_banksize(void)
114 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
115 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
116 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
118 gd->bd->bi_dram[i].start = addr;
119 gd->bd->bi_dram[i].size = size;
123 static int board_uart_init(void)
125 int err, uart_id, ret = 0;
127 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
128 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
130 debug("UART%d not configured\n",
131 (uart_id - PERIPH_ID_UART0));
138 #ifdef CONFIG_BOARD_EARLY_INIT_F
139 int board_early_init_f(void)
142 #ifdef CONFIG_BOARD_TYPES
145 err = board_uart_init();
147 debug("UART init failed\n");
151 #ifdef CONFIG_SYS_I2C_INIT_BOARD
152 board_i2c_init(gd->fdt_blob);
155 #if defined(CONFIG_OF_CONTROL) && defined(CONFIG_EXYNOS_FB)
157 * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs
158 * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix, to reserve
159 * FB memory at a very early stage. So, we need to fill panel_info.vl_col,
160 * panel_info.vl_row and panel_info.vl_bpix before lcd_setmem() is called.
162 err = exynos_lcd_early_init(gd->fdt_blob);
164 debug("LCD early init failed\n");
169 return exynos_early_init_f();
173 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
174 int power_init_board(void)
178 return exynos_power_init();
182 #ifdef CONFIG_OF_CONTROL
183 #ifdef CONFIG_SMC911X
184 static int decode_sromc(const void *blob, struct fdt_sromc *config)
189 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
191 debug("Could not find SROMC node\n");
195 config->bank = fdtdec_get_int(blob, node, "bank", 0);
196 config->width = fdtdec_get_int(blob, node, "width", 2);
198 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
199 FDT_SROM_TIMING_COUNT);
201 debug("Could not decode SROMC configuration Error: %s\n",
203 return -FDT_ERR_NOTFOUND;
209 int board_eth_init(bd_t *bis)
211 #ifdef CONFIG_SMC911X
212 u32 smc_bw_conf, smc_bc_conf;
213 struct fdt_sromc config;
214 fdt_addr_t base_addr;
217 node = decode_sromc(gd->fdt_blob, &config);
219 debug("%s: Could not find sromc configuration\n", __func__);
222 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
224 debug("%s: Could not find lan9215 configuration\n", __func__);
228 /* We now have a node, so any problems from now on are errors */
229 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
230 if (base_addr == FDT_ADDR_T_NONE) {
231 debug("%s: Could not find lan9215 address\n", __func__);
235 /* Ethernet needs data bus width of 16 bits */
236 if (config.width != 2) {
237 debug("%s: Unsupported bus width %d\n", __func__,
241 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
242 | SROMC_BYTE_ENABLE(config.bank);
244 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
245 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
246 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
247 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
248 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
249 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
250 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
252 /* Select and configure the SROMC bank */
253 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
254 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
255 return smc911x_initialize(0, base_addr);
260 #ifdef CONFIG_GENERIC_MMC
261 static int init_mmc(void)
264 return exynos_mmc_init(gd->fdt_blob);
270 static int init_dwmmc(void)
273 return exynos_dwmmc_init(gd->fdt_blob);
279 int board_mmc_init(bd_t *bis)
283 if (get_boot_mode() == BOOT_MODE_SD) {
292 debug("mmc init failed\n");
298 #ifdef CONFIG_DISPLAY_BOARDINFO
301 const char *board_info;
303 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
304 printf("Board: %s\n", board_info ? board_info : "unknown");
305 #ifdef CONFIG_BOARD_TYPES
306 board_info = get_board_type();
308 printf("Model: %s\n", board_info ? board_info : "unknown");
313 #endif /* CONFIG_OF_CONTROL */
315 #ifdef CONFIG_BOARD_LATE_INIT
316 int board_late_init(void)
318 stdio_print_current_devices();
320 if (cros_ec_get_error()) {
321 /* Force console on */
322 gd->flags &= ~GD_FLG_SILENT;
324 printf("cros-ec communications failure %d\n",
325 cros_ec_get_error());
326 puts("\nPlease reset with Power+Refresh\n\n");
327 panic("Cannot init cros-ec device");
334 #ifdef CONFIG_MISC_INIT_R
335 int misc_init_r(void)
337 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
340 #ifdef CONFIG_LCD_MENU
344 #ifdef CONFIG_CMD_BMP
345 if (panel_info.logo_on)
352 void reset_misc(void)
354 struct gpio_desc gpio = {};
357 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
358 "samsung,emmc-reset");
362 gpio_request_by_name_nodev(gd->fdt_blob, node, "reset-gpio", 0, &gpio,
365 if (dm_gpio_is_valid(&gpio)) {
369 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
370 * required by 'JEDEC Standard No.84-A441' (eMMC)
371 * document but real delay time is expected to greater
374 dm_gpio_set_value(&gpio, 0);
376 dm_gpio_set_value(&gpio, 1);
380 int board_usb_cleanup(int index, enum usb_init_type init)
382 #ifdef CONFIG_USB_DWC3
383 dwc3_uboot_exit(index);