Merge tag 'u-boot-rockchip-20200607' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git] / board / renesas / stout / cpld.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Stout board CPLD definition
4  *
5  * Copyright (C) 2015 Renesas Electronics Europe GmbH
6  * Copyright (C) 2015 Renesas Electronics Corporation
7  * Copyright (C) 2015 Cogent Embedded, Inc.
8  */
9
10 #ifndef _CPLD_H_
11 #define _CPLD_H_
12
13 /* power-up behaviour */
14 #define MODE_MSK_FREE_RUN               0x00000001
15 #define MODE_VAL_FREE_RUN               0x00000000
16 #define MODE_MSK_STEP_UP                0x00000001
17 #define MODE_VAL_STEP_UP                0x00000000
18
19 /* boot source */
20 #define MODE_MSK_BOOT_SQPI_16KB_FAST    0x0000000E
21 #define MODE_VAL_BOOT_SQPI_16KB_FAST    0x00000004
22 #define MODE_MSK_BOOT_SQPI_16KB_SLOW    0x0000000E
23 #define MODE_VAL_BOOT_SQPI_16KB_SLOW    0x00000008
24 #define MODE_MSK_BOOT_SQPI_4KB_SLOW     0x0000000E
25 #define MODE_VAL_BOOT_SQPI_4KB_SLOW     0x0000000C
26
27 /* booting CPU */
28 #define MODE_MSK_BOOT_CA15              0x000000C0
29 #define MODE_VAL_BOOT_CA15              0x00000000
30 #define MODE_MSK_BOOT_CA7               0x000000C0
31 #define MODE_VAL_BOOT_CA7               0x00000040
32 #define MODE_MSK_BOOT_SH4               0x000000C0
33 #define MODE_VAL_BOOT_SH4               0x000000C0
34
35 /* JTAG connection */
36 #define MODE_MSK_JTAG_CORESIGHT         0xC0301C00
37 #define MODE_VAL_JTAG_CORESIGHT         0x00200000
38 #define MODE_MSK_JTAG_SH4               0xC0301C00
39 #define MODE_VAL_JTAG_SH4               0x00300000
40
41 /* DDR3 (PLL) speed */
42 #define MODE_MSK_DDR3_1600              0x00080000
43 #define MODE_VAL_DDR3_1600              0x00000000
44 #define MODE_MSK_DDR3_1333              0x00080000
45 #define MODE_VAL_DDR3_1333              0x00080000
46
47 /* ComboPhy0 mode */
48 #define MODE_MSK_PHY0_SATA0             0x01000000
49 #define MODE_VAL_PHY0_SATA0             0x00000000
50 #define MODE_MSK_PHY0_PCIE              0x01000000
51 #define MODE_VAL_PHY0_PCIE              0x01000000
52
53 /* ComboPhy1 mode */
54 #define MODE_MSK_PHY1_SATA1             0x00800000
55 #define MODE_VAL_PHY1_SATA1             0x00000000
56 #define MODE_MSK_PHY1_USB3              0x00800000
57 #define MODE_VAL_PHY1_USB3              0x00800000
58
59 /*
60  * Illegal multiplexer combinations.
61  *    MUX                      Conflicts
62  *    name                  with any one of
63  * VIN0_BT656            VIN0_full, SD2
64  * VIN0_full             VIN0_BT656, SD2, AVB, VIN2_(all)
65  * VIN1_BT656            VIN1_(others), SD0
66  * VIN1_10bit            VIN1_(others), SD0, VIN3_with*, I2C1
67  * VIN1_12bit            VIN1_(others), SD0, VIN3_with*, I2C1, SCIFA0_(all)
68  * VIN2_BT656            VIN0_full, VIN2_(others), AVB,
69  * VIN2_withSYNC         VIN0_full, VIN2_(others), AVB, I2C1, SCIFA0_(all),
70  *                       VIN3_with*
71  * VIN2_withFIELD        VIN0_full, VIN2_(others), AVB, SQPI_(all)
72  * VIN2_withSYNCandFIELD VIN0_full, VIN2_(others), AVB, SQPI_(all), I2C1,
73  *                       SCIFA0_(all), VIN3_with*
74  * VIN3_BT656            VIN3_(others), IRQ3
75  * VIN3_withFIELD        VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
76  *                       VIN2_withSYNCandFIELD, VIN1_10bit
77  * VIN3_withSYNCandFIELD VIN3_(others), IRQ3, VIN1_12bit, VIN2_withSYNC,
78  *                       VIN2_withSYNCandFIELD, VIN1_10bit, I2C1
79  * AVB                   VIN0_full, VIN2_(all)
80  * QSPI_ONBOARD          VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_COMEXPRESS
81  * QSPI_COMEXPRESS       VIN2_withFIELD, VIN2_withSYNCandFIELD, QSPI_ONBOARD
82  * I2C1                  VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
83  *                       VIN3_withSYNCandFIELD
84  * IRQ3                  VIN3_(all)
85  * SCIFA0_USB            VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
86  *                       SCIFA0_COMEXPRESS
87  * SCIFA0_COMEXPRESS     VIN1_12bit, VIN2_withSYNC, VIN2_withSYNCandFIELD,
88  *                       SCIFA0_USB
89  * SCIFA2                PWM210
90  * ETH_ONBOARD           ETH_COMEXPRESS
91  * ETH_COMEXPRESS        ETH_ONBOARD
92  * SD0                   VIN1_(all)
93  * SD2                   VIN0_(all)
94  * PWM210                SCIFA2
95  */
96
97 /* connected to COM Express connector and CN6 for camera, BT656 only */
98 #define MUX_MSK_VIN0_BT656              0x00001001
99 #define MUX_VAL_VIN0_BT656              0x00000000
100 /* connected to COM Express connector and CN6 for camera, all modes */
101 #define MUX_MSK_VIN0_full               0x00001007
102 #define MUX_VAL_VIN0_full               0x00000002
103 /* connected to COM Express connector, BT656 only */
104 #define MUX_MSK_VIN1_BT656              0x00000801
105 #define MUX_VAL_VIN1_BT656              0x00000800
106 /* connected to COM Express connector, all 10-bit modes */
107 #define MUX_MSK_VIN1_10bit              0x00000821
108 #define MUX_VAL_VIN1_10bit              0x00000800
109 /* connected to COM Express connector, all 12-bit modes */
110 #define MUX_MSK_VIN1_12bit              0x000008A1
111 #define MUX_VAL_VIN1_12bit              0x00000880
112 /* connected to COM Express connector, BT656 only */
113 #define MUX_MSK_VIN2_BT656              0x00000007
114 #define MUX_VAL_VIN2_BT656              0x00000006
115 /* connected to COM Express connector, modes with sync signals */
116 #define MUX_MSK_VIN2_withSYNC           0x000000A7
117 #define MUX_VAL_VIN2_withSYNC           0x00000086
118 /* connected to COM Express connector, modes with field, clken signals */
119 #define MUX_MSK_VIN2_withFIELD          0x0000000F
120 #define MUX_VAL_VIN2_withFIELD          0x0000000E
121 /* connected to COM Express connector, modes with sync, field, clken signals */
122 #define MUX_MSK_VIN2_withSYNCandFIELD   0x000000AF
123 #define MUX_VAL_VIN2_withSYNCandFIELD   0x0000008E
124 /* connected to COM Express connector, BT656 only */
125 #define MUX_MSK_VIN3_BT656              0x00000101
126 #define MUX_VAL_VIN3_BT656              0x00000100
127 /* connected to COM Express connector, modes with field, clken signals */
128 #define MUX_MSK_VIN3_withFIELD          0x00000121
129 #define MUX_VAL_VIN3_withFIELD          0x00000120
130 /* connected to COM Express connector, modes with sync, field, clken signals */
131 #define MUX_MSK_VIN3_withSYNCandFIELD   0x00000161
132 #define MUX_VAL_VIN3_withSYNCandFIELD   0x00000120
133 /* connected to COM Express connector (RGMII) */
134 #define MUX_MSK_AVB                     0x00000003
135 #define MUX_VAL_AVB                     0x00000000
136 /* connected to on-board QSPI flash */
137 #define MUX_MSK_QSPI_ONBOARD            0x00000019
138 #define MUX_VAL_QSPI_ONBOARD            0x00000000
139 /* connected to COM Express connector */
140 #define MUX_MSK_QSPI_COMEXPRESS         0x00000019
141 #define MUX_VAL_QSPI_COMEXPRESS         0x00000010
142 /* connected to COM Express connector and PMIC */
143 #define MUX_MSK_I2C1                    0x00000061
144 #define MUX_VAL_I2C1                    0x00000060
145 /* connected to HDMI driver */
146 #define MUX_MSK_IRQ3                    0x00000101
147 #define MUX_VAL_IRQ3                    0x00000000
148 /* connected to USB/FTDI */
149 #define MUX_MSK_SCIFA0_USB              0x00004081
150 #define MUX_VAL_SCIFA0_USB              0x00004000
151 /* connected to COM Express connector */
152 #define MUX_MSK_SCIFA0_COMEXPRESS       0x00004081
153 #define MUX_VAL_SCIFA0_COMEXPRESS       0x00000000
154 /* connected to COM Express connector */
155 #define MUX_MSK_SCIFA2                  0x00002001
156 #define MUX_VAL_SCIFA2                  0x00000000
157 /* connected to on-board 10/100 Phy */
158 #define MUX_MSK_ETH_ONBOARD             0x00000600
159 #define MUX_VAL_ETH_ONBOARD             0x00000000
160 /* connected to COM Express connector (RMII) */
161 #define MUX_MSK_ETH_COMEXPRESS          0x00000600
162 #define MUX_VAL_ETH_COMEXPRESS          0x00000400
163 /* connected to on-board MicroSD slot */
164 #define MUX_MSK_SD0                     0x00000801
165 #define MUX_VAL_SD0                     0x00000000
166 /* connected to COM Express connector */
167 #define MUX_MSK_SD2                     0x00001001
168 #define MUX_VAL_SD2                     0x00001000
169 /* connected to COM Express connector */
170 #define MUX_MSK_PWM210                  0x00002001
171 #define MUX_VAL_PWM210                  0x00002000
172
173 #define HDMI_MSK                        0x07
174 #define HDMI_OFF                        0x00
175 #define HDMI_ONBOARD                    0x07
176 #define HDMI_COMEXPRESS                 0x05
177 #define HDMI_ONBOARD_NODDC              0x03
178 #define HDMI_COMEXPRESS_NODDC           0x01
179
180 void cpld_init(void);
181
182 #endif  /* _CPLD_H_ */