board/renesas/koelsch/qos.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * board/renesas/koelsch/qos.c
   4  *
   5  * Copyright (C) 2013,2014 Renesas Electronics Corporation
   6  *
   7  */
   8
   9 #include <common.h>
  10 #include <asm/processor.h>
  11 #include <asm/mach-types.h>
  12 #include <asm/io.h>
  13 #include <asm/arch/rmobile.h>
  14
  15 /* QoS version 0.240 for ES1 and version 0.411 for ES2 */
  16 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
  17 enum {
  18         DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
  19         DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
  20         DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
  21         DBSC3_15,
  22         DBSC3_NR,
  23 };
  24
  25 static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
  26         [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
  27         [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
  28         [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
  29         [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
  30         [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
  31         [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
  32         [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
  33         [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
  34         [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
  35         [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
  36         [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
  37         [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
  38         [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
  39         [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
  40         [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
  41         [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
  42 };
  43
  44 static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
  45         [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
  46         [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
  47         [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
  48         [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
  49         [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
  50         [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
  51         [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
  52         [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
  53         [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
  54         [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
  55         [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
  56         [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
  57         [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
  58         [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
  59         [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
  60         [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
  61 };
  62
  63 static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {
  64         [DBSC3_00] = DBSC3_1_QOS_R0_BASE,
  65         [DBSC3_01] = DBSC3_1_QOS_R1_BASE,
  66         [DBSC3_02] = DBSC3_1_QOS_R2_BASE,
  67         [DBSC3_03] = DBSC3_1_QOS_R3_BASE,
  68         [DBSC3_04] = DBSC3_1_QOS_R4_BASE,
  69         [DBSC3_05] = DBSC3_1_QOS_R5_BASE,
  70         [DBSC3_06] = DBSC3_1_QOS_R6_BASE,
  71         [DBSC3_07] = DBSC3_1_QOS_R7_BASE,
  72         [DBSC3_08] = DBSC3_1_QOS_R8_BASE,
  73         [DBSC3_09] = DBSC3_1_QOS_R9_BASE,
  74         [DBSC3_10] = DBSC3_1_QOS_R10_BASE,
  75         [DBSC3_11] = DBSC3_1_QOS_R11_BASE,
  76         [DBSC3_12] = DBSC3_1_QOS_R12_BASE,
  77         [DBSC3_13] = DBSC3_1_QOS_R13_BASE,
  78         [DBSC3_14] = DBSC3_1_QOS_R14_BASE,
  79         [DBSC3_15] = DBSC3_1_QOS_R15_BASE,
  80 };
  81
  82 static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {
  83         [DBSC3_00] = DBSC3_1_QOS_W0_BASE,
  84         [DBSC3_01] = DBSC3_1_QOS_W1_BASE,
  85         [DBSC3_02] = DBSC3_1_QOS_W2_BASE,
  86         [DBSC3_03] = DBSC3_1_QOS_W3_BASE,
  87         [DBSC3_04] = DBSC3_1_QOS_W4_BASE,
  88         [DBSC3_05] = DBSC3_1_QOS_W5_BASE,
  89         [DBSC3_06] = DBSC3_1_QOS_W6_BASE,
  90         [DBSC3_07] = DBSC3_1_QOS_W7_BASE,
  91         [DBSC3_08] = DBSC3_1_QOS_W8_BASE,
  92         [DBSC3_09] = DBSC3_1_QOS_W9_BASE,
  93         [DBSC3_10] = DBSC3_1_QOS_W10_BASE,
  94         [DBSC3_11] = DBSC3_1_QOS_W11_BASE,
  95         [DBSC3_12] = DBSC3_1_QOS_W12_BASE,
  96         [DBSC3_13] = DBSC3_1_QOS_W13_BASE,
  97         [DBSC3_14] = DBSC3_1_QOS_W14_BASE,
  98         [DBSC3_15] = DBSC3_1_QOS_W15_BASE,
  99 };
 100
 101 #if defined(CONFIG_QOS_PRI_MEDIA)
 102 #define is_qos_pri_media()      1
 103 #else
 104 #define is_qos_pri_media()      0
 105 #endif
 106
 107 #if defined(CONFIG_QOS_PRI_NORMAL)
 108 #define is_qos_pri_normal()     1
 109 #else
 110 #define is_qos_pri_normal()     0
 111 #endif
 112
 113 #if defined(CONFIG_QOS_PRI_GFX)
 114 #define is_qos_pri_gfx()        1
 115 #else
 116 #define is_qos_pri_gfx()        0
 117 #endif
 118
 119 void qos_init(void)
 120 {
 121         int i;
 122         struct rcar_s3c *s3c;
 123         struct rcar_s3c_qos *s3c_qos;
 124         struct rcar_dbsc3_qos *qos_addr;
 125         struct rcar_mxi *mxi;
 126         struct rcar_mxi_qos *mxi_qos;
 127         struct rcar_axi_qos *axi_qos;
 128
 129         /* DBSC DBADJ2 */
 130         writel(0x20042004, DBSC3_0_DBADJ2);
 131         writel(0x20042004, DBSC3_1_DBADJ2);
 132
 133         /* S3C -QoS */
 134         s3c = (struct rcar_s3c *)S3C_BASE;
 135         if (IS_R8A7791_ES2()) {
 136                 /* Linear All mode */
 137                 /* writel(0x00000000, &s3c->s3cadsplcr); */
 138                 /* Linear Linear 0x7000 to 0x7800 mode */
 139                 writel(0x00BF1B0C, &s3c->s3cadsplcr);
 140                 /* Split Linear 0x6800 t 0x7000 mode */
 141                 /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */
 142                 /* Ssplit All mode */
 143                 /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */
 144
 145                 if (is_qos_pri_media()) {
 146                         writel(0x1F0B0604, &s3c->s3crorr);
 147                         writel(0x1F0E0705, &s3c->s3cworr);
 148                 } else if (is_qos_pri_normal()) {
 149                         writel(0x1F0B0908, &s3c->s3crorr);
 150                         writel(0x1F0E0A08, &s3c->s3cworr);
 151                 } else if (is_qos_pri_gfx()) {
 152                         writel(0x1F0B0B0B, &s3c->s3crorr);
 153                         writel(0x1F0E0C0C, &s3c->s3cworr);
 154                 }
 155         } else {
 156                 writel(0x00FF1B1D, &s3c->s3cadsplcr);
 157                 writel(0x1F0D0C0C, &s3c->s3crorr);
 158                 writel(0x1F0D0C0A, &s3c->s3cworr);
 159         }
 160         /* QoS Control Registers */
 161         s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
 162         writel(0x00890089, &s3c_qos->s3cqos0);
 163         writel(0x20960010, &s3c_qos->s3cqos1);
 164         writel(0x20302030, &s3c_qos->s3cqos2);
 165
 166         if (IS_R8A7791_ES2()) {
 167                 if (is_qos_pri_media())
 168                         writel(0x20AA2300, &s3c_qos->s3cqos3);
 169                 else if (is_qos_pri_normal())
 170                         writel(0x20AA2200, &s3c_qos->s3cqos3);
 171                 else if (is_qos_pri_gfx())
 172                         writel(0x20AA2100, &s3c_qos->s3cqos3);
 173         } else {
 174                 writel(0x20AA2200, &s3c_qos->s3cqos3);
 175         }
 176         writel(0x00002032, &s3c_qos->s3cqos4);
 177         writel(0x20960010, &s3c_qos->s3cqos5);
 178         writel(0x20302030, &s3c_qos->s3cqos6);
 179
 180         if (IS_R8A7791_ES2()) {
 181                 if (is_qos_pri_media())
 182                         writel(0x20AA2300, &s3c_qos->s3cqos7);
 183                 else if (is_qos_pri_normal())
 184                         writel(0x20AA2200, &s3c_qos->s3cqos7);
 185                 else if (is_qos_pri_gfx())
 186                         writel(0x20AA2100, &s3c_qos->s3cqos7);
 187         } else {
 188                 writel(0x20AA2200, &s3c_qos->s3cqos7);
 189         }
 190         writel(0x00002032, &s3c_qos->s3cqos8);
 191
 192         s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
 193         writel(0x00890089, &s3c_qos->s3cqos0);
 194         writel(0x20960010, &s3c_qos->s3cqos1);
 195         writel(0x20302030, &s3c_qos->s3cqos2);
 196         if (IS_R8A7791_ES2()) {
 197                 if (is_qos_pri_media())
 198                         writel(0x20AA2300, &s3c_qos->s3cqos3);
 199                 else if (is_qos_pri_normal())
 200                         writel(0x20AA2200, &s3c_qos->s3cqos3);
 201                 else if (is_qos_pri_gfx())
 202                         writel(0x20AA2100, &s3c_qos->s3cqos3);
 203         } else {
 204                 writel(0x20AA2200, &s3c_qos->s3cqos3);
 205         }
 206         writel(0x00002032, &s3c_qos->s3cqos4);
 207         writel(0x20960010, &s3c_qos->s3cqos5);
 208         writel(0x20302030, &s3c_qos->s3cqos6);
 209         if (IS_R8A7791_ES2()) {
 210                 if (is_qos_pri_media())
 211                         writel(0x20AA2300, &s3c_qos->s3cqos7);
 212                 else if (is_qos_pri_normal())
 213                         writel(0x20AA2200, &s3c_qos->s3cqos7);
 214                 else if (is_qos_pri_gfx())
 215                         writel(0x20AA2100, &s3c_qos->s3cqos7);
 216         } else {
 217                 writel(0x20AA2200, &s3c_qos->s3cqos7);
 218         }
 219         writel(0x00002032, &s3c_qos->s3cqos8);
 220
 221         s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
 222         if (IS_R8A7791_ES2())
 223                 writel(0x80928092, &s3c_qos->s3cqos0);
 224         else
 225                 writel(0x00820082, &s3c_qos->s3cqos0);
 226         writel(0x20960020, &s3c_qos->s3cqos1);
 227         writel(0x20302030, &s3c_qos->s3cqos2);
 228         writel(0x20AA20DC, &s3c_qos->s3cqos3);
 229         writel(0x00002032, &s3c_qos->s3cqos4);
 230         writel(0x20960020, &s3c_qos->s3cqos5);
 231         writel(0x20302030, &s3c_qos->s3cqos6);
 232         writel(0x20AA20DC, &s3c_qos->s3cqos7);
 233         writel(0x00002032, &s3c_qos->s3cqos8);
 234
 235         s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
 236         if (IS_R8A7791_ES2())
 237                 writel(0x80928092, &s3c_qos->s3cqos0);
 238         else
 239                 writel(0x00820082, &s3c_qos->s3cqos0);
 240         writel(0x20960020, &s3c_qos->s3cqos1);
 241         writel(0x20302030, &s3c_qos->s3cqos2);
 242         writel(0x20AA20FA, &s3c_qos->s3cqos3);
 243         writel(0x00002032, &s3c_qos->s3cqos4);
 244         writel(0x20960020, &s3c_qos->s3cqos5);
 245         writel(0x20302030, &s3c_qos->s3cqos6);
 246         writel(0x20AA20FA, &s3c_qos->s3cqos7);
 247         writel(0x00002032, &s3c_qos->s3cqos8);
 248
 249         /* DBSC -QoS */
 250         /* DBSC0 - Read */
 251         for (i = DBSC3_00; i < DBSC3_NR; i++) {
 252                 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
 253                 writel(0x00000002, &qos_addr->dblgcnt);
 254                 writel(0x00002096, &qos_addr->dbtmval0);
 255                 writel(0x00002064, &qos_addr->dbtmval1);
 256                 writel(0x00002032, &qos_addr->dbtmval2);
 257                 writel(0x00001FB0, &qos_addr->dbtmval3);
 258                 writel(0x00000001, &qos_addr->dbrqctr);
 259                 writel(0x00002078, &qos_addr->dbthres0);
 260                 writel(0x0000204B, &qos_addr->dbthres1);
 261                 writel(0x0000201E, &qos_addr->dbthres2);
 262                 writel(0x00000001, &qos_addr->dblgqon);
 263         }
 264
 265         /* DBSC0 - Write */
 266         for (i = DBSC3_00; i < DBSC3_NR; i++) {
 267                 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
 268                 writel(0x00000002, &qos_addr->dblgcnt);
 269                 writel(0x00002096, &qos_addr->dbtmval0);
 270                 writel(0x00002064, &qos_addr->dbtmval1);
 271                 writel(0x00002050, &qos_addr->dbtmval2);
 272                 writel(0x0000203A, &qos_addr->dbtmval3);
 273                 writel(0x00000001, &qos_addr->dbrqctr);
 274                 writel(0x00002078, &qos_addr->dbthres0);
 275                 writel(0x0000204B, &qos_addr->dbthres1);
 276                 writel(0x0000203C, &qos_addr->dbthres2);
 277                 writel(0x00000001, &qos_addr->dblgqon);
 278         }
 279
 280         /* DBSC1 - Read */
 281         for (i = DBSC3_00; i < DBSC3_NR; i++) {
 282                 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
 283                 writel(0x00000002, &qos_addr->dblgcnt);
 284                 writel(0x00002096, &qos_addr->dbtmval0);
 285                 writel(0x00002064, &qos_addr->dbtmval1);
 286                 writel(0x00002032, &qos_addr->dbtmval2);
 287                 writel(0x00001FB0, &qos_addr->dbtmval3);
 288                 writel(0x00000001, &qos_addr->dbrqctr);
 289                 writel(0x00002078, &qos_addr->dbthres0);
 290                 writel(0x0000204B, &qos_addr->dbthres1);
 291                 writel(0x0000201E, &qos_addr->dbthres2);
 292                 writel(0x00000001, &qos_addr->dblgqon);
 293         }
 294
 295         /* DBSC1 - Write */
 296         for (i = DBSC3_00; i < DBSC3_NR; i++) {
 297                 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
 298                 writel(0x00000002, &qos_addr->dblgcnt);
 299                 writel(0x00002096, &qos_addr->dbtmval0);
 300                 writel(0x00002064, &qos_addr->dbtmval1);
 301                 writel(0x00002050, &qos_addr->dbtmval2);
 302                 writel(0x0000203A, &qos_addr->dbtmval3);
 303                 writel(0x00000001, &qos_addr->dbrqctr);
 304                 writel(0x00002078, &qos_addr->dbthres0);
 305                 writel(0x0000204B, &qos_addr->dbthres1);
 306                 writel(0x0000203C, &qos_addr->dbthres2);
 307                 writel(0x00000001, &qos_addr->dblgqon);
 308         }
 309
 310         /* CCI-400 -QoS */
 311         writel(0x20001000, CCI_400_MAXOT_1);
 312         writel(0x20001000, CCI_400_MAXOT_2);
 313         writel(0x0000000C, CCI_400_QOSCNTL_1);
 314         writel(0x0000000C, CCI_400_QOSCNTL_2);
 315
 316         /* MXI -QoS */
 317         /* Transaction Control (MXI) */
 318         mxi = (struct rcar_mxi *)XI_BASE;
 319         writel(0x00000013, &mxi->mxrtcr);
 320         if (IS_R8A7791_ES2()) {
 321                 writel(0x00000016, &mxi->mxwtcr);
 322                 writel(0x00780080, &mxi->mxsaar0);
 323                 writel(0x02000800, &mxi->mxsaar1);
 324         } else {
 325                 writel(0x00000013, &mxi->mxwtcr);
 326         }
 327
 328         /* QoS Control (MXI) */
 329         mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
 330         writel(0x0000000C, &mxi_qos->vspdu0);
 331         writel(0x0000000C, &mxi_qos->vspdu1);
 332         writel(0x0000000E, &mxi_qos->du0);
 333         writel(0x0000000D, &mxi_qos->du1);
 334
 335         /* AXI -QoS */
 336         /* Transaction Control (MXI) */
 337         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
 338         writel(0x00000002, &axi_qos->qosconf);
 339         writel(0x00002245, &axi_qos->qosctset0);
 340         writel(0x00002096, &axi_qos->qosctset1);
 341         writel(0x00002030, &axi_qos->qosctset2);
 342         writel(0x00002030, &axi_qos->qosctset3);
 343         writel(0x00000001, &axi_qos->qosreqctr);
 344         writel(0x00002064, &axi_qos->qosthres0);
 345         writel(0x00002004, &axi_qos->qosthres1);
 346         writel(0x00000000, &axi_qos->qosthres2);
 347         writel(0x00000001, &axi_qos->qosqon);
 348
 349         axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
 350         writel(0x00000000, &axi_qos->qosconf);
 351         writel(0x000020A6, &axi_qos->qosctset0);
 352         writel(0x00000001, &axi_qos->qosreqctr);
 353         writel(0x00002064, &axi_qos->qosthres0);
 354         writel(0x00002004, &axi_qos->qosthres1);
 355         writel(0x00000000, &axi_qos->qosthres2);
 356         writel(0x00000001, &axi_qos->qosqon);
 357
 358         axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
 359         writel(0x00000000, &axi_qos->qosconf);
 360         writel(0x000020A6, &axi_qos->qosctset0);
 361         writel(0x00000001, &axi_qos->qosreqctr);
 362         writel(0x00002064, &axi_qos->qosthres0);
 363         writel(0x00002004, &axi_qos->qosthres1);
 364         writel(0x00000000, &axi_qos->qosthres2);
 365         writel(0x00000001, &axi_qos->qosqon);
 366
 367         axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
 368         writel(0x00000000, &axi_qos->qosconf);
 369         writel(0x00002021, &axi_qos->qosctset0);
 370         writel(0x00000001, &axi_qos->qosreqctr);
 371         writel(0x00002064, &axi_qos->qosthres0);
 372         writel(0x00002004, &axi_qos->qosthres1);
 373         writel(0x00000000, &axi_qos->qosthres2);
 374         writel(0x00000001, &axi_qos->qosqon);
 375
 376         axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
 377         writel(0x00000000, &axi_qos->qosconf);
 378         writel(0x00002037, &axi_qos->qosctset0);
 379         writel(0x00000001, &axi_qos->qosreqctr);
 380         writel(0x00002064, &axi_qos->qosthres0);
 381         writel(0x00002004, &axi_qos->qosthres1);
 382         writel(0x00000000, &axi_qos->qosthres2);
 383         writel(0x00000001, &axi_qos->qosqon);
 384
 385         axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
 386         writel(0x00000002, &axi_qos->qosconf);
 387         writel(0x00002245, &axi_qos->qosctset0);
 388         writel(0x00002096, &axi_qos->qosctset1);
 389         writel(0x00002030, &axi_qos->qosctset2);
 390         writel(0x00002030, &axi_qos->qosctset3);
 391         writel(0x00000001, &axi_qos->qosreqctr);
 392         writel(0x00002064, &axi_qos->qosthres0);
 393         writel(0x00002004, &axi_qos->qosthres1);
 394         writel(0x00000000, &axi_qos->qosthres2);
 395         writel(0x00000001, &axi_qos->qosqon);
 396
 397         axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
 398         writel(0x00000002, &axi_qos->qosconf);
 399         writel(0x00002245, &axi_qos->qosctset0);
 400         writel(0x00002096, &axi_qos->qosctset1);
 401         writel(0x00002030, &axi_qos->qosctset2);
 402         writel(0x00002030, &axi_qos->qosctset3);
 403         writel(0x00000001, &axi_qos->qosreqctr);
 404         writel(0x00002064, &axi_qos->qosthres0);
 405         writel(0x00002004, &axi_qos->qosthres1);
 406         writel(0x00000000, &axi_qos->qosthres2);
 407         writel(0x00000001, &axi_qos->qosqon);
 408
 409         axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
 410         writel(0x00000002, &axi_qos->qosconf);
 411         writel(0x00002245, &axi_qos->qosctset0);
 412         writel(0x00002096, &axi_qos->qosctset1);
 413         writel(0x00002030, &axi_qos->qosctset2);
 414         writel(0x00002030, &axi_qos->qosctset3);
 415         writel(0x00000001, &axi_qos->qosreqctr);
 416         writel(0x00002064, &axi_qos->qosthres0);
 417         writel(0x00002004, &axi_qos->qosthres1);
 418         writel(0x00000000, &axi_qos->qosthres2);
 419         writel(0x00000001, &axi_qos->qosqon);
 420
 421         axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
 422         writel(0x00000000, &axi_qos->qosconf);
 423         writel(0x0000214C, &axi_qos->qosctset0);
 424         writel(0x00000001, &axi_qos->qosreqctr);
 425         writel(0x00002064, &axi_qos->qosthres0);
 426         writel(0x00002004, &axi_qos->qosthres1);
 427         writel(0x00000000, &axi_qos->qosthres2);
 428         writel(0x00000001, &axi_qos->qosqon);
 429
 430         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
 431         writel(0x00000001, &axi_qos->qosconf);
 432         writel(0x00002004, &axi_qos->qosctset0);
 433         writel(0x00002096, &axi_qos->qosctset1);
 434         writel(0x00002030, &axi_qos->qosctset2);
 435         writel(0x00002030, &axi_qos->qosctset3);
 436         writel(0x00000001, &axi_qos->qosreqctr);
 437         writel(0x00002064, &axi_qos->qosthres0);
 438         writel(0x00002004, &axi_qos->qosthres1);
 439         writel(0x00000000, &axi_qos->qosthres2);
 440         writel(0x00000001, &axi_qos->qosqon);
 441
 442         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
 443         writel(0x00000001, &axi_qos->qosconf);
 444         writel(0x00002004, &axi_qos->qosctset0);
 445         writel(0x00002096, &axi_qos->qosctset1);
 446         writel(0x00002030, &axi_qos->qosctset2);
 447         writel(0x00002030, &axi_qos->qosctset3);
 448         writel(0x00000001, &axi_qos->qosreqctr);
 449         writel(0x00002064, &axi_qos->qosthres0);
 450         writel(0x00002004, &axi_qos->qosthres1);
 451         writel(0x00000000, &axi_qos->qosthres2);
 452         writel(0x00000001, &axi_qos->qosqon);
 453
 454         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
 455         writel(0x00000001, &axi_qos->qosconf);
 456         writel(0x00002004, &axi_qos->qosctset0);
 457         writel(0x00002096, &axi_qos->qosctset1);
 458         writel(0x00002030, &axi_qos->qosctset2);
 459         writel(0x00002030, &axi_qos->qosctset3);
 460         writel(0x00000001, &axi_qos->qosreqctr);
 461         writel(0x00002064, &axi_qos->qosthres0);
 462         writel(0x00002004, &axi_qos->qosthres1);
 463         writel(0x00000000, &axi_qos->qosthres2);
 464         writel(0x00000001, &axi_qos->qosqon);
 465
 466         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
 467         writel(0x00000001, &axi_qos->qosconf);
 468         writel(0x00002004, &axi_qos->qosctset0);
 469         writel(0x00002096, &axi_qos->qosctset1);
 470         writel(0x00002030, &axi_qos->qosctset2);
 471         writel(0x00002030, &axi_qos->qosctset3);
 472         writel(0x00000001, &axi_qos->qosreqctr);
 473         writel(0x00002064, &axi_qos->qosthres0);
 474         writel(0x00002004, &axi_qos->qosthres1);
 475         writel(0x00000000, &axi_qos->qosthres2);
 476         writel(0x00000001, &axi_qos->qosqon);
 477
 478         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
 479         writel(0x00000001, &axi_qos->qosconf);
 480         writel(0x00002004, &axi_qos->qosctset0);
 481         writel(0x00002096, &axi_qos->qosctset1);
 482         writel(0x00002030, &axi_qos->qosctset2);
 483         writel(0x00002030, &axi_qos->qosctset3);
 484         writel(0x00000001, &axi_qos->qosreqctr);
 485         writel(0x00002064, &axi_qos->qosthres0);
 486         writel(0x00002004, &axi_qos->qosthres1);
 487         writel(0x00000000, &axi_qos->qosthres2);
 488         writel(0x00000001, &axi_qos->qosqon);
 489
 490         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
 491         writel(0x00000000, &axi_qos->qosconf);
 492         writel(0x00002021, &axi_qos->qosctset0);
 493         writel(0x00000001, &axi_qos->qosreqctr);
 494         writel(0x00002064, &axi_qos->qosthres0);
 495         writel(0x00002004, &axi_qos->qosthres1);
 496         writel(0x00000000, &axi_qos->qosthres2);
 497         writel(0x00000001, &axi_qos->qosqon);
 498
 499         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
 500         writel(0x00000000, &axi_qos->qosconf);
 501         writel(0x00002021, &axi_qos->qosctset0);
 502         writel(0x00000001, &axi_qos->qosreqctr);
 503         writel(0x00002064, &axi_qos->qosthres0);
 504         writel(0x00002004, &axi_qos->qosthres1);
 505         writel(0x00000000, &axi_qos->qosthres2);
 506         writel(0x00000001, &axi_qos->qosqon);
 507
 508         axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
 509         writel(0x00000000, &axi_qos->qosconf);
 510         writel(0x0000214C, &axi_qos->qosctset0);
 511         writel(0x00000001, &axi_qos->qosreqctr);
 512         writel(0x00002064, &axi_qos->qosthres0);
 513         writel(0x00002004, &axi_qos->qosthres1);
 514         writel(0x00000000, &axi_qos->qosthres2);
 515         writel(0x00000001, &axi_qos->qosqon);
 516
 517         axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
 518         writel(0x00000002, &axi_qos->qosconf);
 519         writel(0x00002245, &axi_qos->qosctset0);
 520         writel(0x00002096, &axi_qos->qosctset1);
 521         writel(0x00002030, &axi_qos->qosctset2);
 522         writel(0x00002030, &axi_qos->qosctset3);
 523         writel(0x00000001, &axi_qos->qosreqctr);
 524         writel(0x00002064, &axi_qos->qosthres0);
 525         writel(0x00002004, &axi_qos->qosthres1);
 526         writel(0x00000000, &axi_qos->qosthres2);
 527         writel(0x00000001, &axi_qos->qosqon);
 528
 529         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
 530         writel(0x00000000, &axi_qos->qosconf);
 531         writel(0x000020A6, &axi_qos->qosctset0);
 532         writel(0x00000001, &axi_qos->qosreqctr);
 533         writel(0x00002064, &axi_qos->qosthres0);
 534         writel(0x00002004, &axi_qos->qosthres1);
 535         writel(0x00000000, &axi_qos->qosthres2);
 536         writel(0x00000001, &axi_qos->qosqon);
 537
 538         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
 539         writel(0x00000000, &axi_qos->qosconf);
 540         writel(0x000020A6, &axi_qos->qosctset0);
 541         writel(0x00000001, &axi_qos->qosreqctr);
 542         writel(0x00002064, &axi_qos->qosthres0);
 543         writel(0x00002004, &axi_qos->qosthres1);
 544         writel(0x00000000, &axi_qos->qosthres2);
 545         writel(0x00000001, &axi_qos->qosqon);
 546
 547         axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
 548         writel(0x00000000, &axi_qos->qosconf);
 549         writel(0x00002053, &axi_qos->qosctset0);
 550         writel(0x00000001, &axi_qos->qosreqctr);
 551         writel(0x00002064, &axi_qos->qosthres0);
 552         writel(0x00002004, &axi_qos->qosthres1);
 553         writel(0x00000000, &axi_qos->qosthres2);
 554         writel(0x00000001, &axi_qos->qosqon);
 555
 556         axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
 557         writel(0x00000000, &axi_qos->qosconf);
 558         writel(0x00002053, &axi_qos->qosctset0);
 559         writel(0x00000001, &axi_qos->qosreqctr);
 560         writel(0x00002064, &axi_qos->qosthres0);
 561         writel(0x00002004, &axi_qos->qosthres1);
 562         writel(0x00000000, &axi_qos->qosthres2);
 563         writel(0x00000001, &axi_qos->qosqon);
 564
 565         axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
 566         writel(0x00000000, &axi_qos->qosconf);
 567         writel(0x00002053, &axi_qos->qosctset0);
 568         writel(0x00000001, &axi_qos->qosreqctr);
 569         writel(0x00002064, &axi_qos->qosthres0);
 570         writel(0x00002004, &axi_qos->qosthres1);
 571         writel(0x00000000, &axi_qos->qosthres2);
 572         writel(0x00000001, &axi_qos->qosqon);
 573
 574         axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
 575         writel(0x00000000, &axi_qos->qosconf);
 576         writel(0x0000214C, &axi_qos->qosctset0);
 577         writel(0x00000001, &axi_qos->qosreqctr);
 578         writel(0x00002064, &axi_qos->qosthres0);
 579         writel(0x00002004, &axi_qos->qosthres1);
 580         writel(0x00000000, &axi_qos->qosthres2);
 581         writel(0x00000001, &axi_qos->qosqon);
 582
 583         axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
 584         writel(0x00000002, &axi_qos->qosconf);
 585         writel(0x00002245, &axi_qos->qosctset0);
 586         writel(0x00000001, &axi_qos->qosreqctr);
 587         writel(0x00002064, &axi_qos->qosthres0);
 588         writel(0x00002004, &axi_qos->qosthres1);
 589         writel(0x00000000, &axi_qos->qosthres2);
 590         writel(0x00000001, &axi_qos->qosqon);
 591
 592         axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
 593         writel(0x00000000, &axi_qos->qosconf);
 594         writel(0x00002029, &axi_qos->qosctset0);
 595         writel(0x00000001, &axi_qos->qosreqctr);
 596         writel(0x00002064, &axi_qos->qosthres0);
 597         writel(0x00002004, &axi_qos->qosthres1);
 598         writel(0x00000000, &axi_qos->qosthres2);
 599         writel(0x00000001, &axi_qos->qosqon);
 600
 601         axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
 602         writel(0x00000002, &axi_qos->qosconf);
 603         writel(0x00002245, &axi_qos->qosctset0);
 604         writel(0x00000001, &axi_qos->qosreqctr);
 605         writel(0x00002064, &axi_qos->qosthres0);
 606         writel(0x00002004, &axi_qos->qosthres1);
 607         writel(0x00000000, &axi_qos->qosthres2);
 608         writel(0x00000001, &axi_qos->qosqon);
 609
 610         axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
 611         writel(0x00000000, &axi_qos->qosconf);
 612         writel(0x00002053, &axi_qos->qosctset0);
 613         writel(0x00000001, &axi_qos->qosreqctr);
 614         writel(0x00002064, &axi_qos->qosthres0);
 615         writel(0x00002004, &axi_qos->qosthres1);
 616         writel(0x00000000, &axi_qos->qosthres2);
 617         writel(0x00000001, &axi_qos->qosqon);
 618
 619         axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
 620         writel(0x00000000, &axi_qos->qosconf);
 621         writel(0x000020A6, &axi_qos->qosctset0);
 622         writel(0x00000001, &axi_qos->qosreqctr);
 623         writel(0x00002064, &axi_qos->qosthres0);
 624         writel(0x00002004, &axi_qos->qosthres1);
 625         writel(0x00000000, &axi_qos->qosthres2);
 626         writel(0x00000001, &axi_qos->qosqon);
 627
 628         axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
 629         writel(0x00000000, &axi_qos->qosconf);
 630         writel(0x00002053, &axi_qos->qosctset0);
 631         writel(0x00000001, &axi_qos->qosreqctr);
 632         writel(0x00002064, &axi_qos->qosthres0);
 633         writel(0x00002004, &axi_qos->qosthres1);
 634         writel(0x00000000, &axi_qos->qosthres2);
 635         writel(0x00000001, &axi_qos->qosqon);
 636
 637         axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
 638         writel(0x00000002, &axi_qos->qosconf);
 639         writel(0x00002245, &axi_qos->qosctset0);
 640         writel(0x00000001, &axi_qos->qosreqctr);
 641         writel(0x00002064, &axi_qos->qosthres0);
 642         writel(0x00002004, &axi_qos->qosthres1);
 643         writel(0x00000000, &axi_qos->qosthres2);
 644         writel(0x00000001, &axi_qos->qosqon);
 645
 646         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
 647         writel(0x00000000, &axi_qos->qosconf);
 648         writel(0x00002053, &axi_qos->qosctset0);
 649         writel(0x00000001, &axi_qos->qosreqctr);
 650         writel(0x00002064, &axi_qos->qosthres0);
 651         writel(0x00002004, &axi_qos->qosthres1);
 652         writel(0x00000000, &axi_qos->qosthres2);
 653         writel(0x00000001, &axi_qos->qosqon);
 654
 655         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
 656         writel(0x00000000, &axi_qos->qosconf);
 657         writel(0x00002053, &axi_qos->qosctset0);
 658         writel(0x00000001, &axi_qos->qosreqctr);
 659         writel(0x00002064, &axi_qos->qosthres0);
 660         writel(0x00002004, &axi_qos->qosthres1);
 661         writel(0x00000000, &axi_qos->qosthres2);
 662         writel(0x00000001, &axi_qos->qosqon);
 663
 664         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
 665         writel(0x00000000, &axi_qos->qosconf);
 666         writel(0x0000214C, &axi_qos->qosctset0);
 667         writel(0x00000001, &axi_qos->qosreqctr);
 668         writel(0x00002064, &axi_qos->qosthres0);
 669         writel(0x00002004, &axi_qos->qosthres1);
 670         writel(0x00000000, &axi_qos->qosthres2);
 671         writel(0x00000001, &axi_qos->qosqon);
 672
 673         axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
 674         writel(0x00000000, &axi_qos->qosconf);
 675         writel(0x0000214C, &axi_qos->qosctset0);
 676         writel(0x00000001, &axi_qos->qosreqctr);
 677         writel(0x00002064, &axi_qos->qosthres0);
 678         writel(0x00002004, &axi_qos->qosthres1);
 679         writel(0x00000000, &axi_qos->qosthres2);
 680         writel(0x00000001, &axi_qos->qosqon);
 681
 682         axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
 683         writel(0x00000000, &axi_qos->qosconf);
 684         writel(0x000020A6, &axi_qos->qosctset0);
 685         writel(0x00000001, &axi_qos->qosreqctr);
 686         writel(0x00002064, &axi_qos->qosthres0);
 687         writel(0x00002004, &axi_qos->qosthres1);
 688         writel(0x00000000, &axi_qos->qosthres2);
 689         writel(0x00000001, &axi_qos->qosqon);
 690
 691         axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
 692         writel(0x00000000, &axi_qos->qosconf);
 693         writel(0x00002053, &axi_qos->qosctset0);
 694         writel(0x00000001, &axi_qos->qosreqctr);
 695         writel(0x00002064, &axi_qos->qosthres0);
 696         writel(0x00002004, &axi_qos->qosthres1);
 697         writel(0x00000000, &axi_qos->qosthres2);
 698         writel(0x00000001, &axi_qos->qosqon);
 699
 700         axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
 701         writel(0x00000000, &axi_qos->qosconf);
 702         writel(0x00002053, &axi_qos->qosctset0);
 703         writel(0x00000001, &axi_qos->qosreqctr);
 704         writel(0x00002064, &axi_qos->qosthres0);
 705         writel(0x00002004, &axi_qos->qosthres1);
 706         writel(0x00000000, &axi_qos->qosthres2);
 707         writel(0x00000001, &axi_qos->qosqon);
 708
 709         /* QoS Register (RT-AXI) */
 710         axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
 711         if (IS_R8A7791_ES2())
 712                 writel(0x00000001, &axi_qos->qosconf);
 713         else
 714                 writel(0x00000000, &axi_qos->qosconf);
 715         writel(0x00002053, &axi_qos->qosctset0);
 716         writel(0x00002096, &axi_qos->qosctset1);
 717         writel(0x00002030, &axi_qos->qosctset2);
 718         writel(0x00002030, &axi_qos->qosctset3);
 719         writel(0x00000001, &axi_qos->qosreqctr);
 720         writel(0x00002064, &axi_qos->qosthres0);
 721         writel(0x00002004, &axi_qos->qosthres1);
 722         writel(0x00000000, &axi_qos->qosthres2);
 723         writel(0x00000001, &axi_qos->qosqon);
 724
 725         axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
 726         writel(0x00000000, &axi_qos->qosconf);
 727         writel(0x00002053, &axi_qos->qosctset0);
 728         writel(0x00002096, &axi_qos->qosctset1);
 729         writel(0x00002030, &axi_qos->qosctset2);
 730         writel(0x00002030, &axi_qos->qosctset3);
 731         writel(0x00000001, &axi_qos->qosreqctr);
 732         writel(0x00002064, &axi_qos->qosthres0);
 733         writel(0x00002004, &axi_qos->qosthres1);
 734         writel(0x00000000, &axi_qos->qosthres2);
 735         writel(0x00000001, &axi_qos->qosqon);
 736
 737         axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
 738         writel(0x00000000, &axi_qos->qosconf);
 739         writel(0x00002299, &axi_qos->qosctset0);
 740         writel(0x00000001, &axi_qos->qosreqctr);
 741         writel(0x00002064, &axi_qos->qosthres0);
 742         writel(0x00002004, &axi_qos->qosthres1);
 743         writel(0x00000000, &axi_qos->qosthres2);
 744         writel(0x00000001, &axi_qos->qosqon);
 745
 746         axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
 747         writel(0x00000000, &axi_qos->qosconf);
 748         writel(0x00002029, &axi_qos->qosctset0);
 749         writel(0x00000001, &axi_qos->qosreqctr);
 750         writel(0x00002064, &axi_qos->qosthres0);
 751         writel(0x00002004, &axi_qos->qosthres1);
 752         writel(0x00000000, &axi_qos->qosthres2);
 753         writel(0x00000001, &axi_qos->qosqon);
 754
 755         axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
 756         writel(0x00000002, &axi_qos->qosconf);
 757         writel(0x00002245, &axi_qos->qosctset0);
 758         writel(0x00002096, &axi_qos->qosctset1);
 759         writel(0x00002030, &axi_qos->qosctset2);
 760         writel(0x00002030, &axi_qos->qosctset3);
 761         writel(0x00000001, &axi_qos->qosreqctr);
 762         writel(0x00002064, &axi_qos->qosthres0);
 763         writel(0x00002004, &axi_qos->qosthres1);
 764         writel(0x00000000, &axi_qos->qosthres2);
 765         writel(0x00000001, &axi_qos->qosqon);
 766
 767         axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
 768         writel(0x00000000, &axi_qos->qosconf);
 769         writel(0x00002029, &axi_qos->qosctset0);
 770         writel(0x00002096, &axi_qos->qosctset1);
 771         writel(0x00002030, &axi_qos->qosctset2);
 772         writel(0x00002030, &axi_qos->qosctset3);
 773         writel(0x00000001, &axi_qos->qosreqctr);
 774         writel(0x00002064, &axi_qos->qosthres0);
 775         writel(0x00002004, &axi_qos->qosthres1);
 776         writel(0x00000000, &axi_qos->qosthres2);
 777         writel(0x00000001, &axi_qos->qosqon);
 778
 779         axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
 780         writel(0x00000002, &axi_qos->qosconf);
 781         writel(0x00002245, &axi_qos->qosctset0);
 782         writel(0x00000001, &axi_qos->qosreqctr);
 783         writel(0x00002064, &axi_qos->qosthres0);
 784         writel(0x00002004, &axi_qos->qosthres1);
 785         writel(0x00000000, &axi_qos->qosthres2);
 786         writel(0x00000001, &axi_qos->qosqon);
 787
 788         /* QoS Register (MP-AXI) */
 789         axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
 790         writel(0x00000000, &axi_qos->qosconf);
 791         writel(0x00002037, &axi_qos->qosctset0);
 792         writel(0x00000001, &axi_qos->qosreqctr);
 793         writel(0x00002064, &axi_qos->qosthres0);
 794         writel(0x00002004, &axi_qos->qosthres1);
 795         writel(0x00000000, &axi_qos->qosthres2);
 796         writel(0x00000001, &axi_qos->qosqon);
 797
 798         axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
 799         writel(0x00000001, &axi_qos->qosconf);
 800         writel(0x00002014, &axi_qos->qosctset0);
 801         writel(0x00000040, &axi_qos->qosreqctr);
 802         writel(0x00002064, &axi_qos->qosthres0);
 803         writel(0x00002004, &axi_qos->qosthres1);
 804         writel(0x00000000, &axi_qos->qosthres2);
 805         writel(0x00000001, &axi_qos->qosqon);
 806
 807         axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
 808         writel(0x00000001, &axi_qos->qosconf);
 809         writel(0x00002014, &axi_qos->qosctset0);
 810         writel(0x00000040, &axi_qos->qosreqctr);
 811         writel(0x00002064, &axi_qos->qosthres0);
 812         writel(0x00002004, &axi_qos->qosthres1);
 813         writel(0x00000000, &axi_qos->qosthres2);
 814         writel(0x00000001, &axi_qos->qosqon);
 815
 816         axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
 817         writel(0x00000001, &axi_qos->qosconf);
 818         writel(0x00001FF0, &axi_qos->qosctset0);
 819         writel(0x00000020, &axi_qos->qosreqctr);
 820         writel(0x00002064, &axi_qos->qosthres0);
 821         writel(0x00002004, &axi_qos->qosthres1);
 822         writel(0x00002001, &axi_qos->qosthres2);
 823         writel(0x00000001, &axi_qos->qosqon);
 824
 825         axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
 826         writel(0x00000001, &axi_qos->qosconf);
 827         writel(0x00002004, &axi_qos->qosctset0);
 828         writel(0x00002096, &axi_qos->qosctset1);
 829         writel(0x00002030, &axi_qos->qosctset2);
 830         writel(0x00002030, &axi_qos->qosctset3);
 831         writel(0x00000001, &axi_qos->qosreqctr);
 832         writel(0x00002064, &axi_qos->qosthres0);
 833         writel(0x00002004, &axi_qos->qosthres1);
 834         writel(0x00000000, &axi_qos->qosthres2);
 835         writel(0x00000001, &axi_qos->qosqon);
 836
 837         axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
 838         writel(0x00000000, &axi_qos->qosconf);
 839         writel(0x00002053, &axi_qos->qosctset0);
 840         writel(0x00000001, &axi_qos->qosreqctr);
 841         writel(0x00002064, &axi_qos->qosthres0);
 842         writel(0x00002004, &axi_qos->qosthres1);
 843         writel(0x00000000, &axi_qos->qosthres2);
 844         writel(0x00000001, &axi_qos->qosqon);
 845
 846         axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
 847         writel(0x00000000, &axi_qos->qosconf);
 848         writel(0x0000206E, &axi_qos->qosctset0);
 849         writel(0x00000001, &axi_qos->qosreqctr);
 850         writel(0x00002064, &axi_qos->qosthres0);
 851         writel(0x00002004, &axi_qos->qosthres1);
 852         writel(0x00000000, &axi_qos->qosthres2);
 853         writel(0x00000001, &axi_qos->qosqon);
 854
 855         /* QoS Register (SYS-AXI256) */
 856         axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
 857         writel(0x00000002, &axi_qos->qosconf);
 858         if (IS_R8A7791_ES2())
 859                 writel(0x000020EB, &axi_qos->qosctset0);
 860         else
 861                 writel(0x00002245, &axi_qos->qosctset0);
 862         writel(0x00002096, &axi_qos->qosctset1);
 863         writel(0x00002030, &axi_qos->qosctset2);
 864         writel(0x00002030, &axi_qos->qosctset3);
 865         writel(0x00000001, &axi_qos->qosreqctr);
 866         writel(0x00002064, &axi_qos->qosthres0);
 867         writel(0x00002004, &axi_qos->qosthres1);
 868         writel(0x00000000, &axi_qos->qosthres2);
 869         writel(0x00000001, &axi_qos->qosqon);
 870
 871         axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
 872         writel(0x00000002, &axi_qos->qosconf);
 873         if (IS_R8A7791_ES2())
 874                 writel(0x000020EB, &axi_qos->qosctset0);
 875         else
 876                 writel(0x00002245, &axi_qos->qosctset0);
 877         writel(0x00002096, &axi_qos->qosctset1);
 878         writel(0x00002030, &axi_qos->qosctset2);
 879         writel(0x00002030, &axi_qos->qosctset3);
 880         writel(0x00000001, &axi_qos->qosreqctr);
 881         writel(0x00002064, &axi_qos->qosthres0);
 882         writel(0x00002004, &axi_qos->qosthres1);
 883         writel(0x00000000, &axi_qos->qosthres2);
 884         writel(0x00000001, &axi_qos->qosqon);
 885
 886         axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
 887         writel(0x00000002, &axi_qos->qosconf);
 888         if (IS_R8A7791_ES2())
 889                 writel(0x000020EB, &axi_qos->qosctset0);
 890         else
 891                 writel(0x00002245, &axi_qos->qosctset0);
 892         writel(0x00002096, &axi_qos->qosctset1);
 893         writel(0x00002030, &axi_qos->qosctset2);
 894         writel(0x00002030, &axi_qos->qosctset3);
 895         writel(0x00000001, &axi_qos->qosreqctr);
 896         writel(0x00002064, &axi_qos->qosthres0);
 897         writel(0x00002004, &axi_qos->qosthres1);
 898         writel(0x00000000, &axi_qos->qosthres2);
 899         writel(0x00000001, &axi_qos->qosqon);
 900
 901         axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
 902         writel(0x00000002, &axi_qos->qosconf);
 903         writel(0x00002245, &axi_qos->qosctset0);
 904         writel(0x00002096, &axi_qos->qosctset1);
 905         writel(0x00002030, &axi_qos->qosctset2);
 906         writel(0x00002030, &axi_qos->qosctset3);
 907         writel(0x00000001, &axi_qos->qosreqctr);
 908         writel(0x00002064, &axi_qos->qosthres0);
 909         writel(0x00002004, &axi_qos->qosthres1);
 910         writel(0x00000000, &axi_qos->qosthres2);
 911         writel(0x00000001, &axi_qos->qosqon);
 912
 913         /* QoS Register (CCI-AXI) */
 914         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
 915         writel(0x00000001, &axi_qos->qosconf);
 916         writel(0x00002004, &axi_qos->qosctset0);
 917         writel(0x00002096, &axi_qos->qosctset1);
 918         writel(0x00002030, &axi_qos->qosctset2);
 919         writel(0x00002030, &axi_qos->qosctset3);
 920         writel(0x00000001, &axi_qos->qosreqctr);
 921         writel(0x00002064, &axi_qos->qosthres0);
 922         writel(0x00002004, &axi_qos->qosthres1);
 923         writel(0x00000000, &axi_qos->qosthres2);
 924         writel(0x00000001, &axi_qos->qosqon);
 925
 926         axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
 927         writel(0x00000002, &axi_qos->qosconf);
 928         writel(0x00002245, &axi_qos->qosctset0);
 929         writel(0x00002096, &axi_qos->qosctset1);
 930         writel(0x00002030, &axi_qos->qosctset2);
 931         writel(0x00002030, &axi_qos->qosctset3);
 932         writel(0x00000001, &axi_qos->qosreqctr);
 933         writel(0x00002064, &axi_qos->qosthres0);
 934         writel(0x00002004, &axi_qos->qosthres1);
 935         writel(0x00000000, &axi_qos->qosthres2);
 936         writel(0x00000001, &axi_qos->qosqon);
 937
 938         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
 939         writel(0x00000001, &axi_qos->qosconf);
 940         writel(0x00002004, &axi_qos->qosctset0);
 941         writel(0x00002096, &axi_qos->qosctset1);
 942         writel(0x00002030, &axi_qos->qosctset2);
 943         writel(0x00002030, &axi_qos->qosctset3);
 944         writel(0x00000001, &axi_qos->qosreqctr);
 945         writel(0x00002064, &axi_qos->qosthres0);
 946         writel(0x00002004, &axi_qos->qosthres1);
 947         writel(0x00000000, &axi_qos->qosthres2);
 948         writel(0x00000001, &axi_qos->qosqon);
 949
 950         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
 951         writel(0x00000001, &axi_qos->qosconf);
 952         writel(0x00002004, &axi_qos->qosctset0);
 953         writel(0x00002096, &axi_qos->qosctset1);
 954         writel(0x00002030, &axi_qos->qosctset2);
 955         writel(0x00002030, &axi_qos->qosctset3);
 956         writel(0x00000001, &axi_qos->qosreqctr);
 957         writel(0x00002064, &axi_qos->qosthres0);
 958         writel(0x00002004, &axi_qos->qosthres1);
 959         writel(0x00000000, &axi_qos->qosthres2);
 960         writel(0x00000001, &axi_qos->qosqon);
 961
 962         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
 963         writel(0x00000001, &axi_qos->qosconf);
 964         writel(0x00002004, &axi_qos->qosctset0);
 965         writel(0x00002096, &axi_qos->qosctset1);
 966         writel(0x00002030, &axi_qos->qosctset2);
 967         writel(0x00002030, &axi_qos->qosctset3);
 968         writel(0x00000001, &axi_qos->qosreqctr);
 969         writel(0x00002064, &axi_qos->qosthres0);
 970         writel(0x00002004, &axi_qos->qosthres1);
 971         writel(0x00000000, &axi_qos->qosthres2);
 972         writel(0x00000001, &axi_qos->qosqon);
 973
 974         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
 975         writel(0x00000002, &axi_qos->qosconf);
 976         writel(0x00002245, &axi_qos->qosctset0);
 977         writel(0x00002096, &axi_qos->qosctset1);
 978         writel(0x00002030, &axi_qos->qosctset2);
 979         writel(0x00002030, &axi_qos->qosctset3);
 980         writel(0x00000001, &axi_qos->qosreqctr);
 981         writel(0x00002064, &axi_qos->qosthres0);
 982         writel(0x00002004, &axi_qos->qosthres1);
 983         writel(0x00000000, &axi_qos->qosthres2);
 984         writel(0x00000001, &axi_qos->qosqon);
 985
 986         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
 987         writel(0x00000001, &axi_qos->qosconf);
 988         writel(0x00002004, &axi_qos->qosctset0);
 989         writel(0x00002096, &axi_qos->qosctset1);
 990         writel(0x00002030, &axi_qos->qosctset2);
 991         writel(0x00002030, &axi_qos->qosctset3);
 992         writel(0x00000001, &axi_qos->qosreqctr);
 993         writel(0x00002064, &axi_qos->qosthres0);
 994         writel(0x00002004, &axi_qos->qosthres1);
 995         writel(0x00000000, &axi_qos->qosthres2);
 996         writel(0x00000001, &axi_qos->qosqon);
 997
 998         axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
 999         writel(0x00000001, &axi_qos->qosconf);
1000         writel(0x00002004, &axi_qos->qosctset0);
1001         writel(0x00002096, &axi_qos->qosctset1);
1002         writel(0x00002030, &axi_qos->qosctset2);
1003         writel(0x00002030, &axi_qos->qosctset3);
1004         writel(0x00000001, &axi_qos->qosreqctr);
1005         writel(0x00002064, &axi_qos->qosthres0);
1006         writel(0x00002004, &axi_qos->qosthres1);
1007         writel(0x00000000, &axi_qos->qosthres2);
1008         writel(0x00000001, &axi_qos->qosqon);
1009
1010         /* QoS Register (Media-AXI) */
1011         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
1012         writel(0x00000002, &axi_qos->qosconf);
1013         writel(0x000020DC, &axi_qos->qosctset0);
1014         writel(0x00002096, &axi_qos->qosctset1);
1015         writel(0x00002030, &axi_qos->qosctset2);
1016         writel(0x00002030, &axi_qos->qosctset3);
1017         writel(0x00000020, &axi_qos->qosreqctr);
1018         writel(0x000020AA, &axi_qos->qosthres0);
1019         writel(0x00002032, &axi_qos->qosthres1);
1020         writel(0x00000001, &axi_qos->qosthres2);
1021
1022         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
1023         writel(0x00000002, &axi_qos->qosconf);
1024         writel(0x000020DC, &axi_qos->qosctset0);
1025         writel(0x00002096, &axi_qos->qosctset1);
1026         writel(0x00002030, &axi_qos->qosctset2);
1027         writel(0x00002030, &axi_qos->qosctset3);
1028         writel(0x00000020, &axi_qos->qosreqctr);
1029         writel(0x000020AA, &axi_qos->qosthres0);
1030         writel(0x00002032, &axi_qos->qosthres1);
1031         writel(0x00000001, &axi_qos->qosthres2);
1032
1033         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
1034         writel(0x00000001, &axi_qos->qosconf);
1035         writel(0x00002190, &axi_qos->qosctset0);
1036         writel(0x00000020, &axi_qos->qosreqctr);
1037         writel(0x00002064, &axi_qos->qosthres0);
1038         writel(0x00002004, &axi_qos->qosthres1);
1039         writel(0x00000001, &axi_qos->qosthres2);
1040         writel(0x00000001, &axi_qos->qosqon);
1041
1042         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
1043         writel(0x00000001, &axi_qos->qosconf);
1044         writel(0x00002190, &axi_qos->qosctset0);
1045         writel(0x00000020, &axi_qos->qosreqctr);
1046         if (IS_R8A7791_ES2()) {
1047                 writel(0x00000001, &axi_qos->qosthres0);
1048                 writel(0x00000001, &axi_qos->qosthres1);
1049         } else {
1050                 writel(0x00002064, &axi_qos->qosthres0);
1051                 writel(0x00002004, &axi_qos->qosthres1);
1052         }
1053         writel(0x00000001, &axi_qos->qosthres2);
1054         writel(0x00000001, &axi_qos->qosqon);
1055
1056         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
1057         writel(0x00000001, &axi_qos->qosconf);
1058         writel(0x00002190, &axi_qos->qosctset0);
1059         writel(0x00000020, &axi_qos->qosreqctr);
1060         writel(0x00002064, &axi_qos->qosthres0);
1061         writel(0x00002004, &axi_qos->qosthres1);
1062         writel(0x00000001, &axi_qos->qosthres2);
1063         writel(0x00000001, &axi_qos->qosqon);
1064
1065         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
1066         writel(0x00000001, &axi_qos->qosconf);
1067         writel(0x00002190, &axi_qos->qosctset0);
1068         writel(0x00000020, &axi_qos->qosreqctr);
1069         writel(0x00002064, &axi_qos->qosthres0);
1070         writel(0x00002004, &axi_qos->qosthres1);
1071         writel(0x00000001, &axi_qos->qosthres2);
1072         writel(0x00000001, &axi_qos->qosqon);
1073
1074         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
1075         writel(0x00000001, &axi_qos->qosconf);
1076         writel(0x00002190, &axi_qos->qosctset0);
1077         writel(0x00000020, &axi_qos->qosreqctr);
1078         writel(0x00002064, &axi_qos->qosthres0);
1079         writel(0x00002004, &axi_qos->qosthres1);
1080         writel(0x00000001, &axi_qos->qosthres2);
1081         writel(0x00000001, &axi_qos->qosqon);
1082
1083         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
1084         writel(0x00000001, &axi_qos->qosconf);
1085         writel(0x00002190, &axi_qos->qosctset0);
1086         writel(0x00000020, &axi_qos->qosreqctr);
1087         if (IS_R8A7791_ES2()) {
1088                 writel(0x00000001, &axi_qos->qosthres0);
1089                 writel(0x00000001, &axi_qos->qosthres1);
1090         } else {
1091                 writel(0x00002064, &axi_qos->qosthres0);
1092                 writel(0x00002004, &axi_qos->qosthres1);
1093         }
1094         writel(0x00000001, &axi_qos->qosthres2);
1095         writel(0x00000001, &axi_qos->qosqon);
1096
1097         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
1098         writel(0x00000001, &axi_qos->qosconf);
1099         writel(0x00002190, &axi_qos->qosctset0);
1100         writel(0x00000020, &axi_qos->qosreqctr);
1101         writel(0x00002064, &axi_qos->qosthres0);
1102         writel(0x00002004, &axi_qos->qosthres1);
1103         writel(0x00000001, &axi_qos->qosthres2);
1104         writel(0x00000001, &axi_qos->qosqon);
1105
1106         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
1107         writel(0x00000001, &axi_qos->qosconf);
1108         writel(0x00002190, &axi_qos->qosctset0);
1109         writel(0x00000020, &axi_qos->qosreqctr);
1110         if (IS_R8A7791_ES2()) {
1111                 writel(0x00000001, &axi_qos->qosthres0);
1112                 writel(0x00000001, &axi_qos->qosthres1);
1113         } else {
1114                 writel(0x00002064, &axi_qos->qosthres0);
1115                 writel(0x00002004, &axi_qos->qosthres1);
1116         }
1117         writel(0x00000001, &axi_qos->qosthres2);
1118         writel(0x00000001, &axi_qos->qosqon);
1119
1120         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
1121         writel(0x00000001, &axi_qos->qosconf);
1122         writel(0x00002190, &axi_qos->qosctset0);
1123         writel(0x00000020, &axi_qos->qosreqctr);
1124         writel(0x00002064, &axi_qos->qosthres0);
1125         writel(0x00002004, &axi_qos->qosthres1);
1126         writel(0x00000001, &axi_qos->qosthres2);
1127         writel(0x00000001, &axi_qos->qosqon);
1128
1129         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
1130         writel(0x00000001, &axi_qos->qosconf);
1131         writel(0x00002190, &axi_qos->qosctset0);
1132         writel(0x00000020, &axi_qos->qosreqctr);
1133         if (IS_R8A7791_ES2()) {
1134                 writel(0x00000001, &axi_qos->qosthres0);
1135                 writel(0x00000001, &axi_qos->qosthres1);
1136         } else {
1137                 writel(0x00002064, &axi_qos->qosthres0);
1138                 writel(0x00002004, &axi_qos->qosthres1);
1139         }
1140         writel(0x00000001, &axi_qos->qosthres2);
1141         writel(0x00000001, &axi_qos->qosqon);
1142
1143         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
1144         writel(0x00000001, &axi_qos->qosconf);
1145         if (IS_R8A7791_ES2())
1146                 writel(0x00001FF0, &axi_qos->qosctset0);
1147         else
1148                 writel(0x000020C8, &axi_qos->qosctset0);
1149         writel(0x00000020, &axi_qos->qosreqctr);
1150         writel(0x00002064, &axi_qos->qosthres0);
1151         writel(0x00002004, &axi_qos->qosthres1);
1152         if (IS_R8A7791_ES2())
1153                 writel(0x00002001, &axi_qos->qosthres2);
1154         else
1155                 writel(0x00000001, &axi_qos->qosthres2);
1156         writel(0x00000001, &axi_qos->qosqon);
1157
1158         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
1159         writel(0x00000001, &axi_qos->qosconf);
1160         writel(0x000020C8, &axi_qos->qosctset0);
1161         writel(0x00000020, &axi_qos->qosreqctr);
1162         writel(0x00002064, &axi_qos->qosthres0);
1163         writel(0x00002004, &axi_qos->qosthres1);
1164         writel(0x00000001, &axi_qos->qosthres2);
1165         writel(0x00000001, &axi_qos->qosqon);
1166
1167         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
1168         writel(0x00000001, &axi_qos->qosconf);
1169         writel(0x000020C8, &axi_qos->qosctset0);
1170         writel(0x00000020, &axi_qos->qosreqctr);
1171         if (IS_R8A7791_ES2()) {
1172                 writel(0x00000001, &axi_qos->qosthres0);
1173                 writel(0x00000001, &axi_qos->qosthres1);
1174         } else {
1175                 writel(0x00002064, &axi_qos->qosthres0);
1176                 writel(0x00002004, &axi_qos->qosthres1);
1177         }
1178         writel(0x00000001, &axi_qos->qosthres2);
1179         writel(0x00000001, &axi_qos->qosqon);
1180
1181         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
1182         writel(0x00000001, &axi_qos->qosconf);
1183         writel(0x000020C8, &axi_qos->qosctset0);
1184         writel(0x00000020, &axi_qos->qosreqctr);
1185         writel(0x00002064, &axi_qos->qosthres0);
1186         writel(0x00002004, &axi_qos->qosthres1);
1187         writel(0x00000001, &axi_qos->qosthres2);
1188         writel(0x00000001, &axi_qos->qosqon);
1189
1190         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
1191         writel(0x00000001, &axi_qos->qosconf);
1192         writel(0x000020C8, &axi_qos->qosctset0);
1193         writel(0x00000020, &axi_qos->qosreqctr);
1194         writel(0x00002064, &axi_qos->qosthres0);
1195         writel(0x00002004, &axi_qos->qosthres1);
1196         writel(0x00000001, &axi_qos->qosthres2);
1197         writel(0x00000001, &axi_qos->qosqon);
1198
1199         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
1200         writel(0x00000001, &axi_qos->qosconf);
1201         writel(0x000020C8, &axi_qos->qosctset0);
1202         writel(0x00000020, &axi_qos->qosreqctr);
1203         writel(0x00002064, &axi_qos->qosthres0);
1204         writel(0x00002004, &axi_qos->qosthres1);
1205         writel(0x00000001, &axi_qos->qosthres2);
1206         writel(0x00000001, &axi_qos->qosqon);
1207
1208         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
1209         writel(0x00000001, &axi_qos->qosconf);
1210         writel(0x000020C8, &axi_qos->qosctset0);
1211         writel(0x00000020, &axi_qos->qosreqctr);
1212         if (IS_R8A7791_ES2()) {
1213                 writel(0x00000001, &axi_qos->qosthres0);
1214                 writel(0x00000001, &axi_qos->qosthres1);
1215         } else {
1216                 writel(0x00002064, &axi_qos->qosthres0);
1217                 writel(0x00002004, &axi_qos->qosthres1);
1218         }
1219         writel(0x00000001, &axi_qos->qosthres2);
1220         writel(0x00000001, &axi_qos->qosqon);
1221
1222         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
1223         writel(0x00000001, &axi_qos->qosconf);
1224         writel(0x000020C8, &axi_qos->qosctset0);
1225         writel(0x00000020, &axi_qos->qosreqctr);
1226         writel(0x00002064, &axi_qos->qosthres0);
1227         writel(0x00002004, &axi_qos->qosthres1);
1228         writel(0x00000001, &axi_qos->qosthres2);
1229         writel(0x00000001, &axi_qos->qosqon);
1230
1231         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
1232         writel(0x00000001, &axi_qos->qosconf);
1233         writel(0x000020C8, &axi_qos->qosctset0);
1234         writel(0x00000020, &axi_qos->qosreqctr);
1235         if (IS_R8A7791_ES2()) {
1236                 writel(0x00000001, &axi_qos->qosthres0);
1237                 writel(0x00000001, &axi_qos->qosthres1);
1238         } else {
1239                 writel(0x00002064, &axi_qos->qosthres0);
1240                 writel(0x00002004, &axi_qos->qosthres1);
1241         }
1242         writel(0x00000001, &axi_qos->qosthres2);
1243         writel(0x00000001, &axi_qos->qosqon);
1244
1245         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
1246         writel(0x00000001, &axi_qos->qosconf);
1247         writel(0x000020C8, &axi_qos->qosctset0);
1248         writel(0x00000020, &axi_qos->qosreqctr);
1249         writel(0x00002064, &axi_qos->qosthres0);
1250         writel(0x00002004, &axi_qos->qosthres1);
1251         writel(0x00000001, &axi_qos->qosthres2);
1252         writel(0x00000001, &axi_qos->qosqon);
1253
1254         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
1255         writel(0x00000001, &axi_qos->qosconf);
1256         writel(0x000020C8, &axi_qos->qosctset0);
1257         writel(0x00000020, &axi_qos->qosreqctr);
1258         writel(0x00002064, &axi_qos->qosthres0);
1259         writel(0x00002004, &axi_qos->qosthres1);
1260         writel(0x00000001, &axi_qos->qosthres2);
1261         writel(0x00000001, &axi_qos->qosqon);
1262
1263         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
1264         if (IS_R8A7791_ES2())
1265                 writel(0x00000003, &axi_qos->qosconf);
1266         else
1267                 writel(0x00000000, &axi_qos->qosconf);
1268         writel(0x000020C8, &axi_qos->qosctset0);
1269         writel(0x00002064, &axi_qos->qosthres0);
1270         writel(0x00002004, &axi_qos->qosthres1);
1271         writel(0x00000001, &axi_qos->qosthres2);
1272         writel(0x00000001, &axi_qos->qosqon);
1273
1274         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
1275         if (IS_R8A7791_ES2())
1276                 writel(0x00000003, &axi_qos->qosconf);
1277         else
1278                 writel(0x00000000, &axi_qos->qosconf);
1279         writel(0x000020C8, &axi_qos->qosctset0);
1280         writel(0x00002064, &axi_qos->qosthres0);
1281         writel(0x00002004, &axi_qos->qosthres1);
1282         writel(0x00000001, &axi_qos->qosthres2);
1283         writel(0x00000001, &axi_qos->qosqon);
1284
1285         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
1286         if (IS_R8A7791_ES2())
1287                 writel(0x00000003, &axi_qos->qosconf);
1288         else
1289                 writel(0x00000000, &axi_qos->qosconf);
1290         writel(0x000020C8, &axi_qos->qosctset0);
1291         writel(0x00002064, &axi_qos->qosthres0);
1292         writel(0x00002004, &axi_qos->qosthres1);
1293         writel(0x00000001, &axi_qos->qosthres2);
1294         writel(0x00000001, &axi_qos->qosqon);
1295
1296         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
1297         if (IS_R8A7791_ES2())
1298                 writel(0x00000003, &axi_qos->qosconf);
1299         else
1300                 writel(0x00000000, &axi_qos->qosconf);
1301         writel(0x000020C8, &axi_qos->qosctset0);
1302         writel(0x00002064, &axi_qos->qosthres0);
1303         writel(0x00002004, &axi_qos->qosthres1);
1304         writel(0x00000001, &axi_qos->qosthres2);
1305         writel(0x00000001, &axi_qos->qosqon);
1306
1307         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
1308         if (IS_R8A7791_ES2())
1309                 writel(0x00000003, &axi_qos->qosconf);
1310         else
1311                 writel(0x00000000, &axi_qos->qosconf);
1312         writel(0x00002063, &axi_qos->qosctset0);
1313         writel(0x00000001, &axi_qos->qosreqctr);
1314         writel(0x00002064, &axi_qos->qosthres0);
1315         writel(0x00002004, &axi_qos->qosthres1);
1316         writel(0x00000001, &axi_qos->qosthres2);
1317         writel(0x00000001, &axi_qos->qosqon);
1318
1319         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
1320         if (IS_R8A7791_ES2())
1321                 writel(0x00000000, &axi_qos->qosconf);
1322         else
1323                 writel(0x00000000, &axi_qos->qosconf);
1324         writel(0x00002063, &axi_qos->qosctset0);
1325         writel(0x00000001, &axi_qos->qosreqctr);
1326         writel(0x00002064, &axi_qos->qosthres0);
1327         writel(0x00002004, &axi_qos->qosthres1);
1328         writel(0x00000001, &axi_qos->qosthres2);
1329         writel(0x00000001, &axi_qos->qosqon);
1330
1331         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
1332         writel(0x00000001, &axi_qos->qosconf);
1333         writel(0x00002073, &axi_qos->qosctset0);
1334         writel(0x00000020, &axi_qos->qosreqctr);
1335         writel(0x00002064, &axi_qos->qosthres0);
1336         writel(0x00002004, &axi_qos->qosthres1);
1337         writel(0x00000001, &axi_qos->qosthres2);
1338         writel(0x00000001, &axi_qos->qosqon);
1339
1340         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
1341         writel(0x00000001, &axi_qos->qosconf);
1342         writel(0x00002073, &axi_qos->qosctset0);
1343         writel(0x00000020, &axi_qos->qosreqctr);
1344         if (IS_R8A7791_ES2()) {
1345                 writel(0x00000001, &axi_qos->qosthres0);
1346                 writel(0x00000001, &axi_qos->qosthres1);
1347         } else {
1348                 writel(0x00002064, &axi_qos->qosthres0);
1349                 writel(0x00002004, &axi_qos->qosthres1);
1350         }
1351         writel(0x00000001, &axi_qos->qosthres2);
1352         writel(0x00000001, &axi_qos->qosqon);
1353
1354         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
1355         writel(0x00000001, &axi_qos->qosconf);
1356         writel(0x00002073, &axi_qos->qosctset0);
1357         writel(0x00000020, &axi_qos->qosreqctr);
1358         writel(0x00002064, &axi_qos->qosthres0);
1359         writel(0x00002004, &axi_qos->qosthres1);
1360         writel(0x00000001, &axi_qos->qosthres2);
1361         writel(0x00000001, &axi_qos->qosqon);
1362
1363         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
1364         writel(0x00000001, &axi_qos->qosconf);
1365         writel(0x00002073, &axi_qos->qosctset0);
1366         writel(0x00000020, &axi_qos->qosreqctr);
1367         if (IS_R8A7791_ES2()) {
1368                 writel(0x00000001, &axi_qos->qosthres0);
1369                 writel(0x00000001, &axi_qos->qosthres1);
1370         } else {
1371                 writel(0x00002064, &axi_qos->qosthres0);
1372                 writel(0x00002004, &axi_qos->qosthres1);
1373         }
1374         writel(0x00000001, &axi_qos->qosthres2);
1375         writel(0x00000001, &axi_qos->qosqon);
1376
1377         axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
1378         writel(0x00000001, &axi_qos->qosconf);
1379         writel(0x00002073, &axi_qos->qosctset0);
1380         writel(0x00000020, &axi_qos->qosreqctr);
1381         writel(0x00002064, &axi_qos->qosthres0);
1382         writel(0x00002004, &axi_qos->qosthres1);
1383         writel(0x00000001, &axi_qos->qosthres2);
1384         writel(0x00000001, &axi_qos->qosqon);
1385 }
1386 #else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
1387 void qos_init(void)
1388 {
1389 }
1390 #endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */