1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Renesas Electronics
4 * Copyright (C) Chris Brandt
10 #include <asm/arch/sys_proto.h>
12 #define RZA1_WDT_BASE 0xfcfe0000
17 DECLARE_GLOBAL_DATA_PTR;
21 gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
28 if (fdtdec_setup_mem_size_base() != 0)
34 int dram_init_banksize(void)
36 fdtdec_setup_memory_banksize();
41 void reset_cpu(ulong addr)
43 /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
44 readb(RZA1_WDT_BASE + WRCSR);
46 writew(0xa500, RZA1_WDT_BASE + WRCSR);
47 writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
48 writew(0x5a00, RZA1_WDT_BASE + WTCNT);
49 writew(0xa578, RZA1_WDT_BASE + WTCSR);