1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Renesas Electronics
4 * Copyright (C) Chris Brandt
9 #include <asm/arch/sys_proto.h>
11 #define RZA1_WDT_BASE 0xfcfe0000
16 DECLARE_GLOBAL_DATA_PTR;
20 gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
27 if (fdtdec_setup_mem_size_base() != 0)
33 int dram_init_banksize(void)
35 fdtdec_setup_memory_banksize();
40 void reset_cpu(ulong addr)
42 /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
43 readb(RZA1_WDT_BASE + WRCSR);
45 writew(0xa500, RZA1_WDT_BASE + WRCSR);
46 writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
47 writew(0x5a00, RZA1_WDT_BASE + WTCNT);
48 writew(0xa578, RZA1_WDT_BASE + WTCSR);