1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
9 #include <asm/addrspace.h>
10 #include <asm/types.h>
11 #include <mach/ar71xx_regs.h>
13 #include <mach/ath79.h>
14 #include <debug_uart.h>
16 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
17 void board_debug_uart_init(void)
22 regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
26 * GPIO9 as input, GPIO10 as output
28 val = readl(regs + AR71XX_GPIO_REG_OE);
29 val |= QCA953X_GPIO(9);
30 val &= ~QCA953X_GPIO(10);
31 writel(val, regs + AR71XX_GPIO_REG_OE);
34 * Enable GPIO10 as UART0_SOUT
36 val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2);
37 val &= ~QCA953X_GPIO_MUX_MASK(16);
38 val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16;
39 writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2);
42 * Enable GPIO9 as UART0_SIN
44 val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0);
45 val &= ~QCA953X_GPIO_MUX_MASK(8);
46 val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8;
47 writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0);
50 * Enable GPIO10 output
52 val = readl(regs + AR71XX_GPIO_REG_OUT);
53 val |= QCA953X_GPIO(10);
54 writel(val, regs + AR71XX_GPIO_REG_OUT);
58 int board_early_init_f(void)