3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
5 * (C) Copyright 2001-2004
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <linux/byteorder/swab.h>
31 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
33 /* Board support for 1 or 2 flash devices */
34 #define FLASH_PORT_WIDTH32
35 #undef FLASH_PORT_WIDTH16
37 #ifdef FLASH_PORT_WIDTH16
38 #define FLASH_PORT_WIDTH ushort
39 #define FLASH_PORT_WIDTHV vu_short
42 #define FLASH_PORT_WIDTH ulong
43 #define FLASH_PORT_WIDTHV vu_long
47 /* Intel-compatible flash ID */
48 #define INTEL_COMPAT 0x00890089
49 #define INTEL_ALT 0x00B000B0
51 /* Intel-compatible flash commands */
52 #define INTEL_PROGRAM 0x00100010
53 #define INTEL_ERASE 0x00200020
54 #define INTEL_CLEAR 0x00500050
55 #define INTEL_LOCKBIT 0x00600060
56 #define INTEL_PROTECT 0x00010001
57 #define INTEL_STATUS 0x00700070
58 #define INTEL_READID 0x00900090
59 #define INTEL_CONFIRM 0x00D000D0
60 #define INTEL_RESET 0xFFFFFFFF
62 /* Intel-compatible flash status bits */
63 #define INTEL_FINISHED 0x00800080
64 #define INTEL_OK 0x00800080
66 #define FPW FLASH_PORT_WIDTH
67 #define FPWV FLASH_PORT_WIDTHV
69 #define mb() __asm__ __volatile__ ("" : : : "memory")
71 /*-----------------------------------------------------------------------
74 static ulong flash_get_size (FPW *addr, flash_info_t *info);
75 static int write_data (flash_info_t *info, ulong dest, FPW data);
76 static void flash_get_offsets (ulong base, flash_info_t *info);
77 void inline spin_wheel (void);
78 static void flash_sync_real_protect (flash_info_t * info);
79 static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
81 /*-----------------------------------------------------------------------
84 unsigned long flash_init (void)
88 extern void flash_preinit(void);
89 extern void flash_afterinit(ulong, ulong);
90 ulong flashbase = CFG_FLASH_BASE;
94 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
97 memset(&flash_info[i], 0, sizeof(flash_info_t));
98 flash_get_size ((FPW *) flashbase, &flash_info[i]);
99 flash_get_offsets (flash_info[i].start[0], &flash_info[i]);
102 panic ("configured to many flash banks!\n");
105 size += flash_info[i].size;
107 /* get the h/w and s/w protection status in sync */
108 flash_sync_real_protect(&flash_info[i]);
111 /* Protect monitor and environment sectors
113 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
114 #ifndef CONFIG_BOOT_ROM
115 flash_protect ( FLAG_PROTECT_SET,
117 CFG_MONITOR_BASE + monitor_flash_len - 1,
122 #ifdef CFG_ENV_IS_IN_FLASH
123 flash_protect ( FLAG_PROTECT_SET,
125 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
128 flash_afterinit(flash_info[0].start[0], flash_info[0].size);
133 /*-----------------------------------------------------------------------
135 static void flash_get_offsets (ulong base, flash_info_t *info)
139 if (info->flash_id == FLASH_UNKNOWN) {
143 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
144 for (i = 0; i < info->sector_count; i++) {
145 info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
150 /*-----------------------------------------------------------------------
152 void flash_print_info (flash_info_t *info)
156 if (info->flash_id == FLASH_UNKNOWN) {
157 printf ("missing or unknown FLASH type\n");
161 switch (info->flash_id & FLASH_VENDMASK) {
162 case FLASH_MAN_INTEL:
166 printf ("Unknown Vendor ");
170 switch (info->flash_id & FLASH_TYPEMASK) {
171 case FLASH_28F128J3A:
172 printf ("28F128J3A\n");
175 case FLASH_28F640J3A:
176 printf ("28F640J3A\n");
179 case FLASH_28F320J3A:
180 printf ("28F320J3A\n");
184 printf ("Unknown Chip Type\n");
188 printf (" Size: %ld MB in %d Sectors\n",
189 info->size >> 20, info->sector_count);
191 printf (" Sector Start Addresses:");
192 for (i = 0; i < info->sector_count; ++i) {
197 info->protect[i] ? " (RO)" : " ");
204 * The following code cannot be run from FLASH!
206 static ulong flash_get_size (FPW *addr, flash_info_t *info)
210 /* Write auto select command: read Manufacturer ID */
211 addr[0x5555] = (FPW) 0x00AA00AA;
212 addr[0x2AAA] = (FPW) 0x00550055;
213 addr[0x5555] = (FPW) 0x00900090;
222 case (FPW) INTEL_MANUFACT:
223 info->flash_id = FLASH_MAN_INTEL;
227 info->flash_id = FLASH_UNKNOWN;
228 info->sector_count = 0;
230 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
231 return (0); /* no or unknown flash */
235 value = addr[1]; /* device ID */
239 case (FPW) INTEL_ID_28F128J3A:
240 info->flash_id += FLASH_28F128J3A;
241 info->sector_count = 128;
242 info->size = 0x02000000;
243 info->start[0] = CFG_FLASH_BASE;
244 break; /* => 32 MB */
246 case (FPW) INTEL_ID_28F640J3A:
247 info->flash_id += FLASH_28F640J3A;
248 info->sector_count = 64;
249 info->size = 0x01000000;
250 info->start[0] = CFG_FLASH_BASE + 0x01000000;
251 break; /* => 16 MB */
253 case (FPW) INTEL_ID_28F320J3A:
254 info->flash_id += FLASH_28F320J3A;
255 info->sector_count = 32;
256 info->size = 0x800000;
257 info->start[0] = CFG_FLASH_BASE + 0x01800000;
261 info->flash_id = FLASH_UNKNOWN;
265 if (info->sector_count > CFG_MAX_FLASH_SECT) {
266 printf ("** ERROR: sector count %d > max (%d) **\n",
267 info->sector_count, CFG_MAX_FLASH_SECT);
268 info->sector_count = CFG_MAX_FLASH_SECT;
271 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
278 * This function gets the u-boot flash sector protection status
279 * (flash_info_t.protect[]) in sync with the sector protection
280 * status stored in hardware.
282 static void flash_sync_real_protect (flash_info_t * info)
286 switch (info->flash_id & FLASH_TYPEMASK) {
288 case FLASH_28F128J3A:
289 case FLASH_28F640J3A:
290 case FLASH_28F320J3A:
291 for (i = 0; i < info->sector_count; ++i) {
292 info->protect[i] = intel_sector_protected(info, i);
296 /* no h/w protect support */
303 * checks if "sector" in bank "info" is protected. Should work on intel
304 * strata flash chips 28FxxxJ3x in 8-bit mode.
305 * Returns 1 if sector is protected (or timed-out while trying to read
306 * protection status), 0 if it is not.
308 static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
311 FPWV *lock_conf_addr;
316 * first, wait for the WSM to be finished. The rationale for
317 * waiting for the WSM to become idle for at most
318 * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
319 * because of: (1) erase, (2) program or (3) lock bit
320 * configuration. So we just wait for the longest timeout of
321 * the (1)-(3), i.e. the erase timeout.
324 /* wait at least 35ns (W12) before issuing Read Status Register */
326 addr = (FPWV *) info->start[sector];
327 *addr = (FPW) INTEL_STATUS;
329 start = get_timer (0);
330 while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
331 if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
332 *addr = (FPW) INTEL_RESET; /* restore read mode */
333 printf("WSM busy too long, can't get prot status\n");
338 /* issue the Read Identifier Codes command */
339 *addr = (FPW) INTEL_READID;
341 /* wait at least 35ns (W12) before reading */
344 /* Intel example code uses offset of 2 for 16 bit flash */
345 lock_conf_addr = (FPWV *) info->start[sector] + 2;
346 ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
348 /* put flash back in read mode */
349 *addr = (FPW) INTEL_RESET;
354 /*-----------------------------------------------------------------------
357 int flash_erase (flash_info_t *info, int s_first, int s_last)
359 int flag, prot, sect;
360 ulong type, start, last;
363 if ((s_first < 0) || (s_first > s_last)) {
364 if (info->flash_id == FLASH_UNKNOWN) {
365 printf ("- missing\n");
367 printf ("- no sectors to erase\n");
372 type = (info->flash_id & FLASH_VENDMASK);
373 if ((type != FLASH_MAN_INTEL)) {
374 printf ("Can't erase unknown flash type %08lx - aborted\n",
380 for (sect = s_first; sect <= s_last; ++sect) {
381 if (info->protect[sect]) {
387 printf ("- Warning: %d protected sectors will not be erased!\n",
393 start = get_timer (0);
396 /* Disable interrupts which might cause a timeout here */
397 flag = disable_interrupts ();
399 /* Start erase on unprotected sectors */
400 for (sect = s_first; sect <= s_last; sect++) {
401 if (info->protect[sect] == 0) { /* not protected */
402 FPWV *addr = (FPWV *) (info->start[sect]);
405 printf ("Erasing sector %2d ... ", sect);
407 /* arm simple, non interrupt dependent timer */
408 start = get_timer(0);
410 *addr = (FPW) 0x00500050; /* clear status register */
411 *addr = (FPW) 0x00200020; /* erase setup */
412 *addr = (FPW) 0x00D000D0; /* erase confirm */
414 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
415 if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
416 printf ("Timeout\n");
417 *addr = (FPW) 0x00B000B0; /* suspend erase */
418 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
424 *addr = 0x00500050; /* clear status register cmd. */
425 *addr = 0x00FF00FF; /* resest to read mode */
433 /*-----------------------------------------------------------------------
434 * Copy memory to flash, returns:
437 * 2 - Flash not erased
438 * 4 - Flash not identified
441 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
445 int count, i, l, rc, port_width;
447 if (info->flash_id == FLASH_UNKNOWN) {
450 /* get lower word aligned address */
451 #ifdef FLASH_PORT_WIDTH16
460 * handle unaligned start bytes
462 if ((l = addr - wp) != 0) {
464 for (i = 0, cp = wp; i < l; ++i, ++cp) {
465 data = (data << 8) | (*(uchar *) cp);
467 for (; i < port_width && cnt > 0; ++i) {
468 data = (data << 8) | *src++;
472 for (; cnt == 0 && i < port_width; ++i, ++cp) {
473 data = (data << 8) | (*(uchar *) cp);
476 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
483 * handle word aligned part
486 while (cnt >= port_width) {
488 for (i = 0; i < port_width; ++i) {
489 data = (data << 8) | *src++;
491 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
496 if (count++ > 0x800) {
507 * handle unaligned tail bytes
510 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
511 data = (data << 8) | *src++;
514 for (; i < port_width; ++i, ++cp) {
515 data = (data << 8) | (*(uchar *) cp);
518 return (write_data (info, wp, SWAP (data)));
521 /*-----------------------------------------------------------------------
522 * Write a word or halfword to Flash, returns:
525 * 2 - Flash not erased
527 static int write_data (flash_info_t *info, ulong dest, FPW data)
529 FPWV *addr = (FPWV *) dest;
534 /* Check if Flash is (sufficiently) erased */
535 if ((*addr & data) != data) {
536 printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
539 /* Disable interrupts which might cause a timeout here */
540 flag = disable_interrupts ();
542 *addr = (FPW) 0x00400040; /* write setup */
545 /* arm simple, non interrupt dependent timer */
546 start = get_timer(0);
548 /* wait while polling the status register */
549 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
550 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
551 *addr = (FPW) 0x00FF00FF; /* restore read mode */
556 *addr = (FPW) 0x00FF00FF; /* restore read mode */
561 void inline spin_wheel (void)
564 static char w[] = "\\/-";
566 printf ("\010%c", w[p]);
567 (++p == 3) ? (p = 0) : 0;
570 /*-----------------------------------------------------------------------
571 * Set/Clear sector's lock bit, returns:
573 * 1 - Error (timeout, voltage problems, etc.)
575 int flash_real_protect (flash_info_t *info, long sector, int prot)
580 vu_long *addr = (vu_long *)(info->start[sector]);
581 int flag = disable_interrupts();
583 *addr = INTEL_CLEAR; /* Clear status register */
584 if (prot) { /* Set sector lock bit */
585 *addr = INTEL_LOCKBIT; /* Sector lock bit */
586 *addr = INTEL_PROTECT; /* set */
588 else { /* Clear sector lock bit */
589 *addr = INTEL_LOCKBIT; /* All sectors lock bits */
590 *addr = INTEL_CONFIRM; /* clear */
593 start = get_timer(0);
595 while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
596 if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
597 printf("Flash lock bit operation timed out\n");
603 if (*addr != INTEL_OK) {
604 printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
605 (uint)addr, (uint)*addr);
610 info->protect[sector] = prot;
613 * Clear lock bit command clears all sectors lock bits, so
614 * we have to restore lock bits of protected sectors.
615 * WARNING: code below re-locks sectors only for one bank (info).
616 * This causes problems on boards where several banks share
617 * the same chip, as sectors in othere banks will be unlocked
618 * but not re-locked. It works fine on pm520 though, as there
619 * is only one chip and one bank.
623 for (i = 0; i < info->sector_count; i++)
625 if (info->protect[i])
627 start = get_timer(0);
628 addr = (vu_long *)(info->start[i]);
629 *addr = INTEL_LOCKBIT; /* Sector lock bit */
630 *addr = INTEL_PROTECT; /* set */
631 while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
633 if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT)
635 printf("Flash lock bit operation timed out\n");
643 * get the s/w sector protection status in sync with the h/w,
644 * in case something went wrong during the re-locking.
646 flash_sync_real_protect(info); /* resets flash to read mode */
652 *addr = INTEL_RESET; /* Reset to read array mode */