2 * Maintainer : Steve Sakoman <steve@sakoman.com>
4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Mohammed Khasim <khasim@ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
10 * (C) Copyright 2004-2008
11 * Texas Instruments, <www.ti.com>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <linux/mtd/nand.h>
36 #include <asm/arch/mmc_host_def.h>
37 #include <asm/arch/mux.h>
38 #include <asm/arch/mem.h>
39 #include <asm/arch/sys_proto.h>
40 #include <asm/arch/omap_gpmc.h>
42 #include <asm/mach-types.h>
45 DECLARE_GLOBAL_DATA_PTR;
47 #define TWL4030_I2C_BUS 0
48 #define EXPANSION_EEPROM_I2C_BUS 2
49 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51
51 #define GUMSTIX_SUMMIT 0x01000200
52 #define GUMSTIX_TOBI 0x02000200
53 #define GUMSTIX_TOBI_DUO 0x03000200
54 #define GUMSTIX_PALO35 0x04000200
55 #define GUMSTIX_PALO43 0x05000200
56 #define GUMSTIX_CHESTNUT43 0x06000200
57 #define GUMSTIX_PINTO 0x07000200
58 #define GUMSTIX_GALLOP43 0x08000200
60 #define ETTUS_USRP_E 0x01000300
62 #define GUMSTIX_NO_EEPROM 0xffffffff
65 unsigned int device_vendor;
66 unsigned char revision;
67 unsigned char content;
73 #if defined(CONFIG_CMD_NET)
74 static void setup_net_chip(void);
77 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */
78 static const u32 gpmc_lan_config[] = {
79 NET_LAN9221_GPMC_CONFIG1,
80 NET_LAN9221_GPMC_CONFIG2,
81 NET_LAN9221_GPMC_CONFIG3,
82 NET_LAN9221_GPMC_CONFIG4,
83 NET_LAN9221_GPMC_CONFIG5,
84 NET_LAN9221_GPMC_CONFIG6,
85 /*CONFIG7- computed as params */
90 * Description: Early hardware init.
94 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
95 /* board id for Linux */
96 gd->bd->bi_arch_number = MACH_TYPE_OVERO;
98 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
104 * Routine: get_board_revision
105 * Description: Returns the board revision
107 int get_board_revision(void)
111 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
114 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
115 /* these boards should return a revision number of 0 */
116 /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
117 i2c_set_bus_num(TWL4030_I2C_BUS);
119 i2c_write(0x4B, 0x29, 1, &data, 1);
121 i2c_write(0x4B, 0x2b, 1, &data, 1);
122 i2c_read(0x4B, 0x2a, 1, &data, 1);
125 if (!gpio_request(112, "") &&
126 !gpio_request(113, "") &&
127 !gpio_request(115, "")) {
129 gpio_direction_input(112);
130 gpio_direction_input(113);
131 gpio_direction_input(115);
133 revision = gpio_get_value(115) << 2 |
134 gpio_get_value(113) << 1 |
137 puts("Error: unable to acquire board revision GPIOs\n");
144 #ifdef CONFIG_SPL_BUILD
146 * Routine: get_board_mem_timings
147 * Description: If we use SPL then there is no x-loader nor config header
148 * so we have to setup the DDR timings ourself on both banks.
150 void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
153 *mr = MICRON_V_MR_165;
154 switch (get_board_revision()) {
155 case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
156 *mcfg = MICRON_V_MCFG_165(128 << 20);
157 *ctrla = MICRON_V_ACTIMA_165;
158 *ctrlb = MICRON_V_ACTIMB_165;
159 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
161 case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
162 *mcfg = MICRON_V_MCFG_165(256 << 20);
163 *ctrla = MICRON_V_ACTIMA_165;
164 *ctrlb = MICRON_V_ACTIMB_165;
165 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
167 case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
168 *mcfg = HYNIX_V_MCFG_165(256 << 20);
169 *ctrla = HYNIX_V_ACTIMA_165;
170 *ctrlb = HYNIX_V_ACTIMB_165;
171 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
174 *mcfg = MICRON_V_MCFG_165(128 << 20);
175 *ctrla = MICRON_V_ACTIMA_165;
176 *ctrlb = MICRON_V_ACTIMB_165;
177 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
183 * Routine: get_sdio2_config
184 * Description: Return information about the wifi module connection
185 * Returns 0 if the module connects though a level translator
186 * Returns 1 if the module connects directly
188 int get_sdio2_config(void)
192 if (!gpio_request(130, "") && !gpio_request(139, "")) {
194 gpio_direction_output(130, 0);
195 gpio_direction_input(139);
198 gpio_set_value(130, 0);
199 if (gpio_get_value(139) == 0) {
200 gpio_set_value(130, 1);
201 if (gpio_get_value(139) == 1)
205 gpio_direction_input(130);
207 puts("Error: unable to acquire sdio2 clk GPIOs\n");
215 * Routine: get_expansion_id
216 * Description: This function checks for expansion board by checking I2C
217 * bus 2 for the availability of an AT24C01B serial EEPROM.
218 * returns the device_vendor field from the EEPROM
220 unsigned int get_expansion_id(void)
222 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
224 /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
225 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
226 i2c_set_bus_num(TWL4030_I2C_BUS);
227 return GUMSTIX_NO_EEPROM;
230 /* read configuration data */
231 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
232 sizeof(expansion_config));
234 i2c_set_bus_num(TWL4030_I2C_BUS);
236 return expansion_config.device_vendor;
240 * Routine: misc_init_r
241 * Description: Configure board specific parts
243 int misc_init_r(void)
245 twl4030_power_init();
246 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
248 #if defined(CONFIG_CMD_NET)
252 printf("Board revision: %d\n", get_board_revision());
254 switch (get_sdio2_config()) {
256 puts("Tranceiver detected on mmc2\n");
257 MUX_OVERO_SDIO2_TRANSCEIVER();
260 puts("Direct connection on mmc2\n");
261 MUX_OVERO_SDIO2_DIRECT();
264 puts("Unable to detect mmc2 connection type\n");
267 switch (get_expansion_id()) {
269 printf("Recognized Summit expansion board (rev %d %s)\n",
270 expansion_config.revision,
271 expansion_config.fab_revision);
272 setenv("defaultdisplay", "dvi");
275 printf("Recognized Tobi expansion board (rev %d %s)\n",
276 expansion_config.revision,
277 expansion_config.fab_revision);
278 setenv("defaultdisplay", "dvi");
280 case GUMSTIX_TOBI_DUO:
281 printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
282 expansion_config.revision,
283 expansion_config.fab_revision);
284 /* second lan chip */
285 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
286 0x2B000000, GPMC_SIZE_16M);
289 printf("Recognized Palo35 expansion board (rev %d %s)\n",
290 expansion_config.revision,
291 expansion_config.fab_revision);
292 setenv("defaultdisplay", "lcd35");
295 printf("Recognized Palo43 expansion board (rev %d %s)\n",
296 expansion_config.revision,
297 expansion_config.fab_revision);
298 setenv("defaultdisplay", "lcd43");
300 case GUMSTIX_CHESTNUT43:
301 printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
302 expansion_config.revision,
303 expansion_config.fab_revision);
304 setenv("defaultdisplay", "lcd43");
307 printf("Recognized Pinto expansion board (rev %d %s)\n",
308 expansion_config.revision,
309 expansion_config.fab_revision);
311 case GUMSTIX_GALLOP43:
312 printf("Recognized Gallop43 expansion board (rev %d %s)\n",
313 expansion_config.revision,
314 expansion_config.fab_revision);
315 setenv("defaultdisplay", "lcd43");
318 printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
319 expansion_config.revision,
320 expansion_config.fab_revision);
322 setenv("defaultdisplay", "dvi");
324 case GUMSTIX_NO_EEPROM:
325 puts("No EEPROM on expansion board\n");
328 puts("Unrecognized expansion board\n");
331 if (expansion_config.content == 1)
332 setenv(expansion_config.env_var, expansion_config.env_setting);
340 * Routine: set_muxconf_regs
341 * Description: Setting up the configuration Mux registers specific to the
342 * hardware. Many pins need to be moved from protect to primary
345 void set_muxconf_regs(void)
350 #if defined(CONFIG_CMD_NET)
352 * Routine: setup_net_chip
353 * Description: Setting up the configuration GPMC registers specific to the
356 static void setup_net_chip(void)
358 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
361 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
364 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
365 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
366 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
367 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
368 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
369 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
370 &ctrl_base->gpmc_nadv_ale);
372 /* Make GPIO 64 as output pin and send a magic pulse through it */
373 if (!gpio_request(64, "")) {
374 gpio_direction_output(64, 0);
375 gpio_set_value(64, 1);
377 gpio_set_value(64, 0);
379 gpio_set_value(64, 1);
384 int board_eth_init(bd_t *bis)
387 #ifdef CONFIG_SMC911X
388 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
393 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
394 int board_mmc_init(bd_t *bis)
396 omap_mmc_init(0, 0, 0);