3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
14 * Texas Instruments, <www.ti.com>
15 * Rishi Bhattacharya <rishi@ti.com>
17 * See file CREDITS for list of people who contributed to this
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1610)
38 #include <./configs/omap1510.h>
41 void flash__init (void);
42 void ether__init (void);
43 void set_muxconf_regs (void);
44 void peripheral_power_enable (void);
46 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
48 static inline void delay (unsigned long loops)
50 __asm__ volatile ("1:\n"
52 "bne 1b":"=r" (loops):"0" (loops));
56 * Miscellaneous platform dependent initialisations
61 DECLARE_GLOBAL_DATA_PTR;
63 /* arch number of OMAP 1510-Board */
64 /* to be changed for OMAP 1610 Board */
65 gd->bd->bi_arch_number = 234;
67 /* adress of boot parameters */
68 gd->bd->bi_boot_params = 0x10000100;
70 /* Configure MUX settings */
72 peripheral_power_enable ();
74 /* this speeds up your boot a quite a bit. However to make it
75 * work, you need make sure your kernel startup flush bug is fixed.
86 int misc_init_r (void)
92 /******************************
95 ******************************/
96 void flash__init (void)
98 #define EMIFS_GlB_Config_REG 0xfffecc0c
100 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
101 /* Turn off write protection for flash devices. */
102 regval = regval | 0x0001;
103 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
105 /*************************************************************
107 Description: take the Ethernet controller out of reset and wait
108 for the EEPROM load to complete.
109 *************************************************************/
110 void ether__init (void)
112 #define ETH_CONTROL_REG 0x0480000b
115 *((volatile unsigned short *) 0xfffece08) = 0x03FF;
116 *((volatile unsigned short *) 0xfffb3824) = 0x8000;
117 *((volatile unsigned short *) 0xfffb3830) = 0x0000;
118 *((volatile unsigned short *) 0xfffb3834) = 0x0009;
119 *((volatile unsigned short *) 0xfffb3838) = 0x0009;
120 *((volatile unsigned short *) 0xfffb3818) = 0x0002;
121 *((volatile unsigned short *) 0xfffb382C) = 0x0048;
122 *((volatile unsigned short *) 0xfffb3824) = 0x8603;
124 for (i=0;i<2000;i++);
125 *((volatile unsigned short *) 0xfffb381C) = 0x6610;
127 for (i=0;i<10000;i++);
129 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
135 /******************************
138 ******************************/
141 DECLARE_GLOBAL_DATA_PTR;
143 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
144 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
149 /******************************************************
150 Routine: set_muxconf_regs
151 Description: Setting up the configuration Mux registers
152 specific to the hardware
153 *******************************************************/
154 void set_muxconf_regs (void)
156 volatile unsigned int *MuxConfReg;
157 /* set each registers to its reset value; */
159 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
160 /* setup for UART1 */
161 *MuxConfReg &= ~(0x02000000); /* bit 25 */
162 /* setup for UART2 */
163 *MuxConfReg &= ~(0x01000000); /* bit 24 */
164 /* Disable Uwire CS Hi-Z */
165 *MuxConfReg |= 0x08000000;
167 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
168 *MuxConfReg = 0x00000000;
170 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
171 *MuxConfReg = 0x00000000;
173 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
174 *MuxConfReg = 0x00000000;
176 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
177 /*setup mux for UART3 */
178 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
179 *MuxConfReg &= ~0x0000003e;
181 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
182 *MuxConfReg = 0x00000000;
184 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
185 /* Disable Uwire CS Hi-Z */
186 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
188 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
189 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
190 /* hardware will actually use TX and RTS based on bit 25 in */
191 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
192 *MuxConfReg |= 0x00201000;
194 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
195 *MuxConfReg = 0x00000000;
197 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
198 *MuxConfReg = 0x00000000;
200 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
201 /* setup for UART2 */
202 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
203 /* hardware will actually use TX and RTS based on bit 24 in */
204 /* FUNC_MUX_CTRL_0. */
205 *MuxConfReg |= 0x09000000;
207 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
208 *MuxConfReg |= 0x00000020;
210 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
211 *MuxConfReg = 0x00000000;
213 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
214 *MuxConfReg = 0x00000000;
215 /* mux setup for SD/MMC driver */
217 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
218 *MuxConfReg &= 0xFFFE0FFF;
220 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
221 *MuxConfReg = 0x00000000;
223 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
224 /* bit 13 for MMC2 XOR_CLK */
225 *MuxConfReg &= ~(0x00002000);
226 /* bit 29 for UART 1 */
227 *MuxConfReg &= ~(0x00002000);
229 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
230 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
231 *MuxConfReg |= 0x000C0000;
233 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
234 *MuxConfReg &= ~(0x00000070);
235 *MuxConfReg &= ~(0x00000008);
236 *MuxConfReg |= 0x00000003;
237 *MuxConfReg |= 0x00000180;
239 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
240 /* bit 17, software controls VBUS */
241 *MuxConfReg &= ~(0x00020000);
242 /* Enable USB 48 and 12M clocks */
243 *MuxConfReg |= 0x00000200;
244 *MuxConfReg &= ~(0x00000180);
245 /*2.75V for MMCSDIO1 */
247 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
248 *MuxConfReg = 0x00001FE7;
250 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
251 *MuxConfReg = 0x00000000;
253 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
254 *MuxConfReg = 0x00000000;
256 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
257 *MuxConfReg = 0x00000000;
259 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
260 *MuxConfReg = 0x00000000;
262 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
263 *MuxConfReg = 0x00000000;
265 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
266 *MuxConfReg = 0x00000000;
267 /* Turn on UART2 48 MHZ clock */
269 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
270 *MuxConfReg |= 0x40000000;
272 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
273 /* setup for USB VBus detection OMAP161x */
274 *MuxConfReg |= 0x00040000; /* bit 18 */
276 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
277 /* PullUps for SD/MMC driver */
278 *MuxConfReg |= ~(0xFFFE0FFF);
280 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
281 *MuxConfReg = COMP_MODE_ENABLE;
284 /******************************************************
285 Routine: peripheral_power_enable
286 Description: Enable the power for UART1
287 *******************************************************/
288 void peripheral_power_enable (void)
290 #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
291 #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
293 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;