3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
13 * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #if defined(CONFIG_OMAP1610)
36 #include <./configs/omap1510.h>
39 void flash__init (void);
40 void ether__init (void);
41 void set_muxconf_regs (void);
42 void peripheral_power_enable (void);
44 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
46 static inline void delay (unsigned long loops)
48 __asm__ volatile ("1:\n"
50 "bne 1b":"=r" (loops):"0" (loops));
54 * Miscellaneous platform dependent initialisations
59 DECLARE_GLOBAL_DATA_PTR;
61 /* arch number of OMAP 1510-Board */
62 /* to be changed for OMAP 1610 Board */
63 gd->bd->bi_arch_number = 234;
65 /* adress of boot parameters */
66 gd->bd->bi_boot_params = 0x10000100;
68 /* Configure MUX settings */
70 peripheral_power_enable ();
72 /* this speeds up your boot a quite a bit. However to make it
73 * work, you need make sure your kernel startup flush bug is fixed.
84 int misc_init_r (void)
90 /******************************
93 ******************************/
94 void flash__init (void)
96 #define EMIFS_GlB_Config_REG 0xfffecc0c
98 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
99 /* Turn off write protection for flash devices. */
100 regval = regval | 0x0001;
101 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
103 /*************************************************************
105 Description: take the Ethernet controller out of reset and wait
106 for the EEPROM load to complete.
107 *************************************************************/
108 void ether__init (void)
110 #define ETH_CONTROL_REG 0x0400030b
112 #ifdef CONFIG_H2_OMAP1610
113 #define LAN_RESET_REGISTER 0x0400001c
115 /* The debug board on which the lan chip resides may not be powered
116 * ON at the same time as the OMAP chip. So wait in a loop until the
117 * lan reset register (on the debug board) is available (powered on)
118 * and reset the lan chip.
121 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
123 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
125 } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
128 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
130 } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
133 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
137 /******************************
140 ******************************/
143 DECLARE_GLOBAL_DATA_PTR;
145 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
146 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
151 /******************************************************
152 Routine: set_muxconf_regs
153 Description: Setting up the configuration Mux registers
154 specific to the hardware
155 *******************************************************/
156 void set_muxconf_regs (void)
158 volatile unsigned int *MuxConfReg;
159 /* set each registers to its reset value; */
161 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
162 /* setup for UART1 */
163 *MuxConfReg &= ~(0x02000000); /* bit 25 */
164 /* setup for UART2 */
165 *MuxConfReg &= ~(0x01000000); /* bit 24 */
166 /* Disable Uwire CS Hi-Z */
167 *MuxConfReg |= 0x08000000;
169 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
170 *MuxConfReg = 0x00000000;
172 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
173 *MuxConfReg = 0x00000000;
175 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
176 *MuxConfReg = 0x00000000;
178 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
179 /*setup mux for UART3 */
180 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
181 *MuxConfReg &= ~0x0000003e;
183 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
184 *MuxConfReg = 0x00000000;
186 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
187 /* Disable Uwire CS Hi-Z */
188 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
190 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
191 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
192 /* hardware will actually use TX and RTS based on bit 25 in */
193 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
194 *MuxConfReg |= 0x00201000;
196 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
197 *MuxConfReg = 0x00000000;
199 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
200 *MuxConfReg = 0x00000000;
202 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
203 /* setup for UART2 */
204 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
205 /* hardware will actually use TX and RTS based on bit 24 in */
206 /* FUNC_MUX_CTRL_0. */
207 *MuxConfReg |= 0x09000000;
209 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
210 *MuxConfReg = 0x00000000;
212 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
213 *MuxConfReg = 0x00000000;
214 /* mux setup for SD/MMC driver */
216 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
217 *MuxConfReg &= 0xFFFE0FFF;
219 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
220 *MuxConfReg = 0x00000000;
222 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
223 /* bit 13 for MMC2 XOR_CLK */
224 *MuxConfReg &= ~(0x00002000);
225 /* bit 29 for UART 1 */
226 *MuxConfReg &= ~(0x00002000);
228 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
229 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
230 *MuxConfReg |= 0x000C0000;
232 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
233 *MuxConfReg &= ~(0x00000070);
234 *MuxConfReg &= ~(0x00000008);
235 *MuxConfReg |= 0x00000003;
236 *MuxConfReg |= 0x00000180;
238 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
239 /* bit 17, software controls VBUS */
240 *MuxConfReg &= ~(0x00020000);
241 /* Enable USB 48 and 12M clocks */
242 *MuxConfReg |= 0x00000200;
243 *MuxConfReg &= ~(0x00000180);
244 /*2.75V for MMCSDIO1 */
246 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
247 *MuxConfReg = 0x00001FE7;
249 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
250 *MuxConfReg = 0x00000000;
252 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
253 *MuxConfReg = 0x00000000;
255 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
256 *MuxConfReg = 0x00000000;
258 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
259 *MuxConfReg = 0x00000000;
261 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
262 *MuxConfReg = 0x00000000;
264 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
265 *MuxConfReg = 0x00000000;
266 /* Turn on UART2 48 MHZ clock */
268 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
269 *MuxConfReg |= 0x40000000;
271 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
272 /* setup for USB VBus detection OMAP161x */
273 *MuxConfReg |= 0x00040000; /* bit 18 */
275 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
276 /* PullUps for SD/MMC driver */
277 *MuxConfReg |= ~(0xFFFE0FFF);
279 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
280 *MuxConfReg = COMP_MODE_ENABLE;
283 /******************************************************
284 Routine: peripheral_power_enable
285 Description: Enable the power for UART1
286 *******************************************************/
287 void peripheral_power_enable (void)
289 #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
290 #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
292 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;