3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/pinmux.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/mc.h>
16 #include <asm/arch-tegra/clk_rst.h>
17 #include <asm/arch-tegra/pmc.h>
18 #include <power/as3722.h>
19 #include <power/pmic.h>
20 #include "pinmux-config-nyan-big.h"
23 * Routine: pinmux_init
24 * Description: Do individual peripheral pinmux configs
26 void pinmux_init(void)
28 gpio_config_table(nyan_big_gpio_inits,
29 ARRAY_SIZE(nyan_big_gpio_inits));
31 pinmux_config_pingrp_table(nyan_big_pingrps,
32 ARRAY_SIZE(nyan_big_pingrps));
34 pinmux_config_drvgrp_table(nyan_big_drvgrps,
35 ARRAY_SIZE(nyan_big_drvgrps));
38 int tegra_board_id(void)
40 static const int vector[] = {TEGRA_GPIO(Q, 3), TEGRA_GPIO(T, 1),
41 TEGRA_GPIO(X, 1), TEGRA_GPIO(X, 4),
44 gpio_claim_vector(vector, "board_id%d");
45 return gpio_get_values_as_int(vector);
48 int tegra_lcd_pmic_init(int board_id)
53 ret = uclass_get_device_by_driver(UCLASS_PMIC,
54 DM_GET_DRIVER(pmic_as3722), &dev);
56 debug("%s: Failed to find PMIC\n", __func__);
61 pmic_reg_write(dev, 0x00, 0x3c);
63 pmic_reg_write(dev, 0x00, 0x50);
64 pmic_reg_write(dev, 0x12, 0x10);
65 pmic_reg_write(dev, 0x0c, 0x07);
66 pmic_reg_write(dev, 0x20, 0x10);
71 /* Setup required information for Linux kernel */
72 static void setup_kernel_info(void)
74 struct mc_ctlr *mc = (void *)NV_PA_MC_BASE;
76 /* The kernel graphics driver needs this region locked down */
77 writel(0, &mc->mc_video_protect_bom);
78 writel(0, &mc->mc_video_protect_size_mb);
79 writel(1, &mc->mc_video_protect_reg_ctrl);
83 * We need to take ALL audio devices conntected to AHUB (AUDIO, APBIF,
84 * I2S, DAM, AMX, ADX, SPDIF, AFC) out of reset and enable the clocks.
85 * Otherwise reading AHUB devices will hang when the kernel boots.
87 static void enable_required_clocks(void)
89 static enum periph_id ids[] = {
115 for (i = 0; i < ARRAY_SIZE(ids); i++)
116 clock_enable(ids[i]);
118 for (i = 0; i < ARRAY_SIZE(ids); i++)
119 reset_set_enable(ids[i], 0);
122 int nvidia_board_init(void)
124 clock_start_periph_pll(PERIPH_ID_EXTPERIPH1, CLOCK_ID_OSC, 12000000);
125 clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_OSC, 1500000);
127 /* For external MAX98090 audio codec */
128 clock_external_output(1);
130 enable_required_clocks();