2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/compiler.h>
12 #include <asm/arch/clock.h>
14 #include <asm/arch/display.h>
16 #include <asm/arch/funcmux.h>
17 #include <asm/arch/pinmux.h>
18 #include <asm/arch/pmu.h>
19 #ifdef CONFIG_PWM_TEGRA
20 #include <asm/arch/pwm.h>
22 #include <asm/arch/tegra.h>
23 #include <asm/arch-tegra/board.h>
24 #include <asm/arch-tegra/clk_rst.h>
25 #include <asm/arch-tegra/pmc.h>
26 #include <asm/arch-tegra/sys_proto.h>
27 #include <asm/arch-tegra/uart.h>
28 #include <asm/arch-tegra/warmboot.h>
29 #ifdef CONFIG_TEGRA_CLOCK_SCALING
30 #include <asm/arch/emc.h>
32 #ifdef CONFIG_USB_EHCI_TEGRA
33 #include <asm/arch-tegra/usb.h>
34 #include <asm/arch/usb.h>
37 #ifdef CONFIG_TEGRA_MMC
38 #include <asm/arch-tegra/tegra_mmc.h>
39 #include <asm/arch-tegra/mmc.h>
45 DECLARE_GLOBAL_DATA_PTR;
47 const struct tegra_sysinfo sysinfo = {
48 CONFIG_TEGRA_BOARD_STRING
51 void __pin_mux_usb(void)
55 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
57 void __pin_mux_spi(void)
61 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
63 void __gpio_early_init_uart(void)
67 void gpio_early_init_uart(void)
68 __attribute__((weak, alias("__gpio_early_init_uart")));
70 void __pin_mux_nand(void)
72 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
75 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
77 void __pin_mux_display(void)
81 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
84 * Routine: power_det_init
85 * Description: turn off power detects
87 static void power_det_init(void)
89 #if defined(CONFIG_TEGRA20)
90 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
92 /* turn off power detects */
93 writel(0, &pmc->pmc_pwr_det_latch);
94 writel(0, &pmc->pmc_pwr_det);
100 * Description: Early hardware init.
104 __maybe_unused int err;
106 /* Do clocks and UART first so that printf() works */
110 #ifdef CONFIG_FDT_SPI
115 #ifdef CONFIG_PWM_TEGRA
116 if (pwm_init(gd->fdt_blob))
117 debug("%s: Failed to init pwm\n", __func__);
121 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
123 /* boot param addr */
124 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
128 #ifdef CONFIG_SYS_I2C_TEGRA
129 #ifndef CONFIG_SYS_I2C_INIT_BOARD
130 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
133 # ifdef CONFIG_TEGRA_PMU
134 if (pmu_set_nominal())
135 debug("Failed to select nominal voltages\n");
136 # ifdef CONFIG_TEGRA_CLOCK_SCALING
137 err = board_emc_init();
139 debug("Memory controller init failed: %d\n", err);
141 # endif /* CONFIG_TEGRA_PMU */
142 #endif /* CONFIG_SYS_I2C_TEGRA */
144 #ifdef CONFIG_USB_EHCI_TEGRA
146 usb_process_devicetree(gd->fdt_blob);
150 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
153 #ifdef CONFIG_TEGRA_NAND
157 #ifdef CONFIG_TEGRA_LP0
158 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
159 warmboot_save_sdram_params();
161 /* prepare the WB code to LP0 location */
162 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
168 #ifdef CONFIG_BOARD_EARLY_INIT_F
169 static void __gpio_early_init(void)
173 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
175 int board_early_init_f(void)
177 #if !defined(CONFIG_TEGRA20)
182 /* Initialize periph GPIOs */
184 gpio_early_init_uart();
186 tegra_lcd_early_init(gd->fdt_blob);
191 #endif /* EARLY_INIT */
193 int board_late_init(void)
196 /* Make sure we finish initing the LCD */
197 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
202 #if defined(CONFIG_TEGRA_MMC)
203 void __pin_mux_mmc(void)
207 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
209 /* this is a weak define that we are overriding */
210 int board_mmc_init(bd_t *bd)
212 debug("%s called\n", __func__);
214 /* Enable muxes, etc. for SDMMC controllers */
217 debug("%s: init MMC\n", __func__);
223 void pad_init_mmc(struct mmc_host *host)
225 #if defined(CONFIG_TEGRA30)
226 enum periph_id id = host->mmc_id;
229 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
230 (unsigned int)host->reg, id);
232 /* Set the pad drive strength for SDMMC1 or 3 only */
233 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
234 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
239 val = readl(&host->reg->sdmemcmppadctl);
241 val |= MEMCOMP_PADCTRL_VREF;
242 writel(val, &host->reg->sdmemcmppadctl);
244 val = readl(&host->reg->autocalcfg);
246 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
247 writel(val, &host->reg->autocalcfg);