1 HCU5 configuration details and startup sequence
3 (C) Copyright 2007 Netstal Maschinen AG
4 Niklaus Giger (Niklaus.Giger@netstal.com)
8 - Fix error: Waiting for PHY auto negotiation to complete..... TIMEOUT !
9 - Does not occur if both EMAC are connected
10 - Fix RTS/CTS problem (HW?)
11 CONFIG_SERIAL_MULTI/CONFIG_SERIAL_SOFTWARE_FIFO hangs after
12 Switching to interrupt driven serial input mode
16 Errata CHIP_8: Incorrect Write to DDR SDRAM. (was not applied to sequoia.c)
20 Memory Bank 0 -- Flash chip
21 ---------------------------
23 0xfff00000 - 0xffffffff
25 The flash chip is really only 512Kbytes, but the high address bit of
26 the 1Meg region is ignored, so the flash is replicated through the
27 region. Thus, this is consistent with a flash base address 0xfff80000.
29 The placement at the end is to be consistent with reset behavior,
30 where the processor itself initially uses this bus to load the branch
31 vector and start running.
36 0xe0010000- 0xe0013fff CONFIG_SYS_OCM_BASE
37 The 440EPx includes a 16K on-chip memory that can be placed however
43 0xef600300 - 0xef6008ff
45 These are scattered various peripherals internal to the PPC440EPX
48 Chip-Select 2: Flash Memory
49 ---------------------------
53 Chip-Select 3: CAN Interface
54 ----------------------------
55 0xc800000: 2 Intel 82527 CAN-Controller
58 Chip-Select 4: IMC-bus standard
59 -------------------------------
61 0xcc00000: Netstal specific IO-Bus
64 Chip-Select 5: IMC-bus fast (inactive)
65 --------------------------------------
67 0xce00000: Netstal specific IO-Bus (fast, but not yet used)
71 -------------------------------------
73 0x00000000 - 0xfffffff # Default 256 MB
78 Only USB_STORAGE is enabled to load vxWorks
81 System-LEDs ??? (Analog zu HCU4 ???)
86 (cpu/ppc4xx/resetvec.S)
87 depending on configs option
88 call _start_440 _start_pci oder _start
93 initialize register like
96 setup interrupt vectors
97 configure cache regions
101 which in turn will jump to start
103 Clear and set up some registers.
105 Setup the internal SRAM
106 Setup the stack in internal SRAM
107 setup stack pointer (r1)
109 call cpu_init_f /* run low-level CPU init code (from Flash) */
112 board_init_f: (lib_ppc\board.c)
113 init_sequence defines a list of function to be called
114 board_early_init_f: (board/netstal/hcu5/hcu5.c)
115 We are using Bootstrap-Option A
116 if CPR0_ICFG_RLI_MASK == 0 then set some registers and reboot
118 Setup the interrupt controller polarities, triggers, etc.
119 Ethernet, PCI, USB enable
120 setup BOOT FLASH (Chip timing)
127 init_func_ram -> calls init_dram board/netstal/hcu5/sdram.c
128 (EYE function removed!!)
131 * Reserve memory at end of RAM for (top down in that order):
132 * - kernel log buffer
136 * - board info struct
137 Save local variables to board info struct
138 call relocate_code() does not return
139 relocate_code: (cpu/ppc4xx/start.S)
140 -------------------------------------------------------
141 From now on our copy is in RAM and we will run from there,
142 starting with board_init_r
143 -------------------------------------------------------
144 board_init_r: (lib_ppc\board.c)
145 setup bd function pointers
147 flash_init: (board/netstal/hcu5/flash.c)
148 /* setup for u-boot erase, update */
150 cpu_init_r: (cpu/ppc4xx/cpu_init.c)
151 peripheral chip select in using defines like
152 CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h
155 spi_init (r or f)??? (CONFIG_ENV_IS_IN_EEPROM)
157 misc_init_r(bd): (board/netstal/hcu5.c)
158 ethaddr mit serial number ergänzen
159 Then we will somehow go into the command loop
161 Most of the HW specific code for the HCU5 may be found in
162 include/configs/hcu5.h
168 Drivers for serial etc are found under drivers/
170 Don't ask question if you did not look at the README !!
171 Most CONFIG_SYS_* and CONFIG_* switches are mentioned/explained there.