2 * (C) 2000-2004 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
3 * (C) 2003 August Hoeraendl, Logotronic GmbH
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #undef CONFIG_FLASH_16BIT
28 #if defined CFG_JFFS_CUSTOM_PART
29 #include <jffs2/jffs2.h>
32 #define FLASH_BANK_SIZE MX1FS2_FLASH_BANK_SIZE
33 #define MAIN_SECT_SIZE MX1FS2_FLASH_SECT_SIZE
35 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
38 * NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
39 * has nothing to do with the flash chip being 8-bit or 16-bit.
41 #ifdef CONFIG_FLASH_16BIT
42 typedef unsigned short FLASH_PORT_WIDTH;
43 typedef volatile unsigned short FLASH_PORT_WIDTHV;
45 #define FLASH_ID_MASK 0xFFFF
47 typedef unsigned long FLASH_PORT_WIDTH;
48 typedef volatile unsigned long FLASH_PORT_WIDTHV;
50 #define FLASH_ID_MASK 0xFFFFFFFF
53 #define FPW FLASH_PORT_WIDTH
54 #define FPWV FLASH_PORT_WIDTHV
56 #define ORMASK(size) ((-size) & OR_AM_MSK)
58 /*-----------------------------------------------------------------------
62 static ulong flash_get_size(FPWV * addr, flash_info_t * info);
63 static void flash_get_offsets(ulong base, flash_info_t * info);
65 static void flash_reset(flash_info_t * info);
66 static int write_word_intel(flash_info_t * info, FPWV * dest, FPW data);
67 static int write_word_amd(flash_info_t * info, FPWV * dest, FPW data);
68 #define write_word(in, de, da) write_word_amd(in, de, da)
69 #ifdef CFG_FLASH_PROTECTION
70 static void flash_sync_real_protect(flash_info_t * info);
73 #if defined CFG_JFFS_CUSTOM_PART
76 * jffs2_part_info - get information about a JFFS2 partition
78 * @part_num: number of the partition you want to get info about
79 * @return: struct part_info* in case of success, 0 if failure
82 static struct part_info part;
83 static int current_part = -1;
86 jffs2_part_info(int part_num)
88 void *jffs2_priv_saved = part.jffs2_priv;
90 printf("jffs2_part_info: part_num=%i\n", part_num);
92 if (current_part == part_num)
97 memset(&part, 0, sizeof (part));
99 part.offset = (char *) MX1FS2_JFFS2_PART0_START;
100 part.size = MX1FS2_JFFS2_PART0_SIZE;
102 /* Mark the struct as ready */
103 current_part = part_num;
105 printf("part.offset = 0x%08x\n", (unsigned int) part.offset);
106 printf("part.size = 0x%08x\n", (unsigned int) part.size);
111 memset(&part, 0, sizeof (part));
113 part.offset = (char *) MX1FS2_JFFS2_PART1_START;
114 part.size = MX1FS2_JFFS2_PART1_SIZE;
116 /* Mark the struct as ready */
117 current_part = part_num;
119 printf("part.offset = 0x%08x\n", (unsigned int) part.offset);
120 printf("part.size = 0x%08x\n", (unsigned int) part.size);
123 if (current_part == part_num) {
124 part.usr_priv = ¤t_part;
125 part.jffs2_priv = jffs2_priv_saved;
129 printf("jffs2_part_info: end of partition table\n");
132 #endif /* CFG_JFFS_CUSTOM_PART */
134 /*-----------------------------------------------------------------------
137 * sets up flash_info and returns size of FLASH (bytes)
145 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
147 flash_info[i].flash_id =
148 (FLASH_MAN_AMD & FLASH_VENDMASK) |
149 (FLASH_AM640U & FLASH_TYPEMASK);
150 flash_info[i].size = FLASH_BANK_SIZE;
151 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
152 memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
155 flashbase = MX1FS2_FLASH_BASE;
158 panic("configured too many flash banks!\n");
161 for (j = 0; j < flash_info[i].sector_count; j++) {
162 flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
164 size += flash_info[i].size;
167 /* Protect monitor and environment sectors */
168 flash_protect(FLAG_PROTECT_SET,
170 CFG_FLASH_BASE + _bss_start - _armboot_start,
173 flash_protect(FLAG_PROTECT_SET,
175 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
180 /*-----------------------------------------------------------------------
183 flash_reset(flash_info_t * info)
185 FPWV *base = (FPWV *) (info->start[0]);
187 /* Put FLASH back in read mode */
188 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
189 *base = (FPW) 0x00FF00FF; /* Intel Read Mode */
190 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
191 *base = (FPW) 0x00F000F0; /* AMD Read Mode */
194 /*-----------------------------------------------------------------------
198 flash_get_offsets(ulong base, flash_info_t * info)
202 /* set up sector start address table */
203 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL
204 && (info->flash_id & FLASH_BTYPE)) {
205 int bootsect_size; /* number of bytes/boot sector */
206 int sect_size; /* number of bytes/regular sector */
208 bootsect_size = 0x00002000 * (sizeof (FPW) / 2);
209 sect_size = 0x00010000 * (sizeof (FPW) / 2);
211 /* set sector offsets for bottom boot block type */
212 for (i = 0; i < 8; ++i) {
213 info->start[i] = base + (i * bootsect_size);
215 for (i = 8; i < info->sector_count; i++) {
216 info->start[i] = base + ((i - 7) * sect_size);
218 } else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
219 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U) {
221 int sect_size; /* number of bytes/sector */
223 sect_size = 0x00010000 * (sizeof (FPW) / 2);
225 /* set up sector start address table (uniform sector type) */
226 for (i = 0; i < info->sector_count; i++)
227 info->start[i] = base + (i * sect_size);
232 /*-----------------------------------------------------------------------
236 flash_print_info(flash_info_t * info)
242 uchar botbootletter[] = "B";
243 uchar topbootletter[] = "T";
244 uchar botboottype[] = "bottom boot sector";
245 uchar topboottype[] = "top boot sector";
247 if (info->flash_id == FLASH_UNKNOWN) {
248 printf("missing or unknown FLASH type\n");
252 switch (info->flash_id & FLASH_VENDMASK) {
257 printf("BRIGHT MICRO ");
268 case FLASH_MAN_INTEL:
272 printf("Unknown Vendor ");
276 /* check for top or bottom boot, if it applies */
277 if (info->flash_id & FLASH_BTYPE) {
278 boottype = botboottype;
279 bootletter = botbootletter;
281 boottype = topboottype;
282 bootletter = topbootletter;
285 switch (info->flash_id & FLASH_TYPEMASK) {
287 fmt = "29LV641D (64 Mbit, uniform sectors)\n";
289 case FLASH_28F800C3B:
290 case FLASH_28F800C3T:
291 fmt = "28F800C3%s (8 Mbit, %s)\n";
293 case FLASH_INTEL800B:
294 case FLASH_INTEL800T:
295 fmt = "28F800B3%s (8 Mbit, %s)\n";
297 case FLASH_28F160C3B:
298 case FLASH_28F160C3T:
299 fmt = "28F160C3%s (16 Mbit, %s)\n";
301 case FLASH_INTEL160B:
302 case FLASH_INTEL160T:
303 fmt = "28F160B3%s (16 Mbit, %s)\n";
305 case FLASH_28F320C3B:
306 case FLASH_28F320C3T:
307 fmt = "28F320C3%s (32 Mbit, %s)\n";
309 case FLASH_INTEL320B:
310 case FLASH_INTEL320T:
311 fmt = "28F320B3%s (32 Mbit, %s)\n";
313 case FLASH_28F640C3B:
314 case FLASH_28F640C3T:
315 fmt = "28F640C3%s (64 Mbit, %s)\n";
317 case FLASH_INTEL640B:
318 case FLASH_INTEL640T:
319 fmt = "28F640B3%s (64 Mbit, %s)\n";
322 fmt = "Unknown Chip Type\n";
326 printf(fmt, bootletter, boottype);
328 printf(" Size: %ld MB in %d Sectors\n",
329 info->size >> 20, info->sector_count);
331 printf(" Sector Start Addresses:");
333 for (i = 0; i < info->sector_count; ++i) {
338 printf(" %08lX%s", info->start[i],
339 info->protect[i] ? " (RO)" : " ");
345 /*-----------------------------------------------------------------------
349 * The following code cannot be run from FLASH!
354 flash_get_size(FPWV * addr, flash_info_t * info)
356 /* Write auto select command: read Manufacturer ID */
358 /* Write auto select command sequence and test FLASH answer */
359 addr[0x0555] = (FPW) 0x00AA00AA; /* for AMD, Intel ignores this */
360 addr[0x02AA] = (FPW) 0x00550055; /* for AMD, Intel ignores this */
361 addr[0x0555] = (FPW) 0x00900090; /* selects Intel or AMD */
363 /* The manufacturer codes are only 1 byte, so just use 1 byte.
364 * This works for any bus width and any FLASH device width.
366 switch (addr[0] & 0xff) {
368 case (uchar) AMD_MANUFACT:
369 info->flash_id = FLASH_MAN_AMD;
372 case (uchar) INTEL_MANUFACT:
373 info->flash_id = FLASH_MAN_INTEL;
377 info->flash_id = FLASH_UNKNOWN;
378 info->sector_count = 0;
383 /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
384 if (info->flash_id != FLASH_UNKNOWN)
387 case (FPW) AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
388 info->flash_id += FLASH_AM640U;
389 info->sector_count = 128;
390 info->size = 0x00800000 * (sizeof (FPW) / 2);
391 break; /* => 8 or 16 MB */
393 case (FPW) INTEL_ID_28F800C3B:
394 info->flash_id += FLASH_28F800C3B;
395 info->sector_count = 23;
396 info->size = 0x00100000 * (sizeof (FPW) / 2);
397 break; /* => 1 or 2 MB */
399 case (FPW) INTEL_ID_28F800B3B:
400 info->flash_id += FLASH_INTEL800B;
401 info->sector_count = 23;
402 info->size = 0x00100000 * (sizeof (FPW) / 2);
403 break; /* => 1 or 2 MB */
405 case (FPW) INTEL_ID_28F160C3B:
406 info->flash_id += FLASH_28F160C3B;
407 info->sector_count = 39;
408 info->size = 0x00200000 * (sizeof (FPW) / 2);
409 break; /* => 2 or 4 MB */
411 case (FPW) INTEL_ID_28F160B3B:
412 info->flash_id += FLASH_INTEL160B;
413 info->sector_count = 39;
414 info->size = 0x00200000 * (sizeof (FPW) / 2);
415 break; /* => 2 or 4 MB */
417 case (FPW) INTEL_ID_28F320C3B:
418 info->flash_id += FLASH_28F320C3B;
419 info->sector_count = 71;
420 info->size = 0x00400000 * (sizeof (FPW) / 2);
421 break; /* => 4 or 8 MB */
423 case (FPW) INTEL_ID_28F320B3B:
424 info->flash_id += FLASH_INTEL320B;
425 info->sector_count = 71;
426 info->size = 0x00400000 * (sizeof (FPW) / 2);
427 break; /* => 4 or 8 MB */
429 case (FPW) INTEL_ID_28F640C3B:
430 info->flash_id += FLASH_28F640C3B;
431 info->sector_count = 135;
432 info->size = 0x00800000 * (sizeof (FPW) / 2);
433 break; /* => 8 or 16 MB */
435 case (FPW) INTEL_ID_28F640B3B:
436 info->flash_id += FLASH_INTEL640B;
437 info->sector_count = 135;
438 info->size = 0x00800000 * (sizeof (FPW) / 2);
439 break; /* => 8 or 16 MB */
442 info->flash_id = FLASH_UNKNOWN;
443 info->sector_count = 0;
445 return (0); /* => no or unknown flash */
448 flash_get_offsets((ulong) addr, info);
450 /* Put FLASH back in read mode */
457 #ifdef CFG_FLASH_PROTECTION
458 /*-----------------------------------------------------------------------
462 flash_sync_real_protect(flash_info_t * info)
464 FPWV *addr = (FPWV *) (info->start[0]);
468 switch (info->flash_id & FLASH_TYPEMASK) {
469 case FLASH_28F800C3B:
470 case FLASH_28F800C3T:
471 case FLASH_28F160C3B:
472 case FLASH_28F160C3T:
473 case FLASH_28F320C3B:
474 case FLASH_28F320C3T:
475 case FLASH_28F640C3B:
476 case FLASH_28F640C3T:
477 /* check for protected sectors */
478 *addr = (FPW) 0x00900090;
479 for (i = 0; i < info->sector_count; i++) {
480 /* read sector protection at sector address, (A7 .. A0) = 0x02.
481 * D0 = 1 for each device if protected.
482 * If at least one device is protected the sector is marked
483 * protected, but mixed protected and unprotected devices
484 * within a sector should never happen.
486 sect = (FPWV *) (info->start[i]);
488 (sect[2] & (FPW) (0x00010001)) ? 1 : 0;
491 /* Put FLASH back in read mode */
497 /* no hardware protect that we support */
503 /*-----------------------------------------------------------------------
507 flash_erase(flash_info_t * info, int s_first, int s_last)
510 int flag, prot, sect;
511 int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
512 ulong start, now, last;
515 if ((s_first < 0) || (s_first > s_last)) {
516 if (info->flash_id == FLASH_UNKNOWN) {
517 printf("- missing\n");
519 printf("- no sectors to erase\n");
524 switch (info->flash_id & FLASH_TYPEMASK) {
525 case FLASH_INTEL800B:
526 case FLASH_INTEL160B:
527 case FLASH_INTEL320B:
528 case FLASH_INTEL640B:
529 case FLASH_28F800C3B:
530 case FLASH_28F160C3B:
531 case FLASH_28F320C3B:
532 case FLASH_28F640C3B:
537 printf("Can't erase unknown flash type %08lx - aborted\n",
543 for (sect = s_first; sect <= s_last; ++sect) {
544 if (info->protect[sect]) {
550 printf("- Warning: %d protected sectors will not be erased!\n",
556 start = get_timer(0);
559 /* Start erase on unprotected sectors */
560 for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
562 if (info->protect[sect] != 0) /* protected, skip it */
565 /* Disable interrupts which might cause a timeout here */
566 flag = disable_interrupts();
568 addr = (FPWV *) (info->start[sect]);
570 *addr = (FPW) 0x00500050; /* clear status register */
571 *addr = (FPW) 0x00200020; /* erase setup */
572 *addr = (FPW) 0x00D000D0; /* erase confirm */
574 /* must be AMD style if not Intel */
575 FPWV *base; /* first address in bank */
577 base = (FPWV *) (info->start[0]);
578 base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
579 base[0x02AA] = (FPW) 0x00550055; /* unlock */
580 base[0x0555] = (FPW) 0x00800080; /* erase mode */
581 base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
582 base[0x02AA] = (FPW) 0x00550055; /* unlock */
583 *addr = (FPW) 0x00300030; /* erase sector */
586 /* re-enable interrupts if necessary */
590 /* wait at least 50us for AMD, 80us for Intel.
595 while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) {
596 if ((now = get_timer(0)) - start > CFG_FLASH_ERASE_TOUT) {
601 *addr = (FPW) 0x00B000B0;
604 flash_reset(info); /* reset to read mode */
605 rcode = 1; /* failed */
609 /* show that we're waiting */
610 if ((now - last) > 1000) { /* every second */
616 flash_reset(info); /* reset to read mode */
623 /*-----------------------------------------------------------------------
624 * Copy memory to flash, returns:
627 * 2 - Flash not erased
630 bad_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
632 FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
633 int bytes; /* number of bytes to program in current word */
634 int left; /* number of bytes left to program */
637 for (left = cnt, res = 0;
638 left > 0 && res == 0;
639 addr += sizeof (data), left -= sizeof (data) - bytes) {
641 bytes = addr & (sizeof (data) - 1);
642 addr &= ~(sizeof (data) - 1);
644 /* combine source and destination data so can program
645 * an entire word of 16 or 32 bits
647 for (i = 0; i < sizeof (data); i++) {
649 if (i < bytes || i - bytes >= left)
650 data += *((uchar *) addr + i);
655 /* write one word to the flash */
656 switch (info->flash_id & FLASH_VENDMASK) {
658 res = write_word_amd(info, (FPWV *) addr, data);
660 case FLASH_MAN_INTEL:
661 res = write_word_intel(info, (FPWV *) addr, data);
664 /* unknown flash type, error! */
665 printf("missing or unknown FLASH type\n");
666 res = 1; /* not really a timeout, but gives error */
675 * write_buf: - Copy memory to flash.
678 * @param src: source of copy transaction
679 * @param addr: where to copy to
680 * @param cnt: number of bytes to copy
686 write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
693 wp = (addr & ~1); /* get lower word aligned address */
695 /* handle unaligned start bytes */
696 if ((l = addr - wp) != 0) {
698 for (i = 0, cp = wp; i < l; ++i, ++cp) {
699 data = (data >> 8) | (*(uchar *) cp << 8);
701 for (; i < 2 && cnt > 0; ++i) {
702 data = (data >> 8) | (*src++ << 8);
706 for (; cnt == 0 && i < 2; ++i, ++cp) {
707 data = (data >> 8) | (*(uchar *) cp << 8);
710 if ((rc = write_word(info, (FPWV *)wp, data)) != 0) {
716 /* handle word aligned part */
718 /* data = *((vushort*)src); */
719 data = *((FPW *) src);
720 if ((rc = write_word(info, (FPWV *)wp, data)) != 0) {
732 * handle unaligned tail bytes
735 for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
736 data = (data >> 8) | (*src++ << 8);
739 for (; i < 2; ++i, ++cp) {
740 data = (data >> 8) | (*(uchar *) cp << 8);
743 return write_word(info, (FPWV *)wp, data);
746 /*-----------------------------------------------------------------------
747 * Write a word to Flash for AMD FLASH
748 * A word is 16 or 32 bits, whichever the bus width of the flash bank
749 * (not an individual chip) is.
754 * 2 - Flash not erased
757 write_word_amd(flash_info_t * info, FPWV * dest, FPW data)
761 int res = 0; /* result, assume success */
762 FPWV *base; /* first address in flash bank */
764 /* Check if Flash is (sufficiently) erased */
765 if ((*dest & data) != data) {
769 base = (FPWV *) (info->start[0]);
770 /* Disable interrupts which might cause a timeout here */
771 flag = disable_interrupts();
773 base[0x0555] = (FPW) 0x00AA00AA; /* unlock */
774 base[0x02AA] = (FPW) 0x00550055; /* unlock */
775 base[0x0555] = (FPW) 0x00A000A0; /* selects program mode */
777 *dest = data; /* start programming the data */
779 /* re-enable interrupts if necessary */
783 start = get_timer(0);
785 /* data polling for D7 */
787 && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) {
788 if (get_timer(0) - start > CFG_FLASH_WRITE_TOUT) {
789 *dest = (FPW) 0x00F000F0; /* reset bank */
790 printf("SHA timeout\n");
798 /*-----------------------------------------------------------------------
799 * Write a word to Flash for Intel FLASH
800 * A word is 16 or 32 bits, whichever the bus width of the flash bank
801 * (not an individual chip) is.
806 * 2 - Flash not erased
809 write_word_intel(flash_info_t * info, FPWV * dest, FPW data)
813 int res = 0; /* result, assume success */
815 /* Check if Flash is (sufficiently) erased */
816 if ((*dest & data) != data) {
820 /* Disable interrupts which might cause a timeout here */
821 flag = disable_interrupts();
823 *dest = (FPW) 0x00500050; /* clear status register */
824 *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
825 *dest = (FPW) 0x00400040; /* program setup */
827 *dest = data; /* start programming the data */
829 /* re-enable interrupts if necessary */
833 start = get_timer(0);
835 while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) {
836 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
837 *dest = (FPW) 0x00B000B0; /* Suspend program */
842 if (res == 0 && (*dest & (FPW) 0x00100010))
843 res = 1; /* write failed, time out error is close enough */
845 *dest = (FPW) 0x00500050; /* clear status register */
846 *dest = (FPW) 0x00FF00FF; /* make sure in read mode */
851 #ifdef CFG_FLASH_PROTECTION
852 /*-----------------------------------------------------------------------
855 flash_real_protect(flash_info_t * info, long sector, int prot)
857 int rcode = 0; /* assume success */
858 FPWV *addr; /* address of sector */
861 addr = (FPWV *) (info->start[sector]);
863 switch (info->flash_id & FLASH_TYPEMASK) {
864 case FLASH_28F800C3B:
865 case FLASH_28F800C3T:
866 case FLASH_28F160C3B:
867 case FLASH_28F160C3T:
868 case FLASH_28F320C3B:
869 case FLASH_28F320C3T:
870 case FLASH_28F640C3B:
871 case FLASH_28F640C3T:
872 flash_reset(info); /* make sure in read mode */
873 *addr = (FPW) 0x00600060L; /* lock command setup */
875 *addr = (FPW) 0x00010001L; /* lock sector */
877 *addr = (FPW) 0x00D000D0L; /* unlock sector */
878 flash_reset(info); /* reset to read mode */
880 /* now see if it really is locked/unlocked as requested */
881 *addr = (FPW) 0x00900090;
882 /* read sector protection at sector address, (A7 .. A0) = 0x02.
883 * D0 = 1 for each device if protected.
884 * If at least one device is protected the sector is marked
885 * protected, but return failure. Mixed protected and
886 * unprotected devices within a sector should never happen.
888 value = addr[2] & (FPW) 0x00010001;
890 info->protect[sector] = 0;
891 else if (value == (FPW) 0x00010001)
892 info->protect[sector] = 1;
894 /* error, mixed protected and unprotected */
896 info->protect[sector] = 1;
898 if (info->protect[sector] != prot)
899 rcode = 1; /* failed to protect/unprotect as requested */
901 /* reload all protection bits from hardware for now */
902 flash_sync_real_protect(info);
907 /* no hardware protect that we support */
908 info->protect[sector] = prot;