board/mpc8641hpcn/oftree.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8641HPCN";
  15         compatible = "mpc86xx";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         linux,phandle = <100>;
  19
  20         cpus {
  21                 #cpus = <2>;
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24                 linux,phandle = <200>;
  25
  26                 PowerPC,8641@0 {
  27                         device_type = "cpu";
  28                         reg = <0>;
  29                         d-cache-line-size = <20>;       // 32 bytes
  30                         i-cache-line-size = <20>;       // 32 bytes
  31                         d-cache-size = <8000>;          // L1, 32K
  32                         i-cache-size = <8000>;          // L1, 32K
  33                         timebase-frequency = <0>;       //  33 MHz, from uboot
  34                         bus-frequency = <0>;            // From uboot
  35                         clock-frequency = <0>;          // From uboot
  36                         32-bit;
  37                         linux,phandle = <201>;
  38                         linux,boot-cpu;
  39                 };
  40                 PowerPC,8641@1 {
  41                         device_type = "cpu";
  42                         reg = <1>;
  43                         d-cache-line-size = <20>;       // 32 bytes
  44                         i-cache-line-size = <20>;       // 32 bytes
  45                         d-cache-size = <8000>;          // L1, 32K
  46                         i-cache-size = <8000>;          // L1, 32K
  47                         timebase-frequency = <0>;       //  33 MHz, from uboot
  48                         bus-frequency = <0>;            // From uboot
  49                         clock-frequency = <0>;          // From uboot
  50                         32-bit;
  51                         linux,phandle = <202>;
  52                 };
  53         };
  54
  55         memory {
  56                 device_type = "memory";
  57                 linux,phandle = <300>;
  58                 reg = <00000000 40000000>;      // 1G at 0x0, replaced by uboot
  59         };
  60
  61         soc8641@f8000000 {
  62                 #address-cells = <1>;
  63                 #size-cells = <1>;
  64                 #interrupt-cells = <2>;
  65                 device_type = "soc";
  66                 ranges = <0 f8000000 00100000>;
  67                 reg = <f8000000 00100000>;      // CCSRBAR 1M
  68                 bus-frequency = <0>;
  69
  70                 i2c@3000 {
  71                         device_type = "i2c";
  72                         compatible = "fsl-i2c";
  73                         reg = <3000 100>;
  74                         interrupts = <2b 0>;
  75                         interrupt-parent = <40000>;
  76                         dfsrr;
  77                 };
  78
  79                 i2c@3100 {
  80                         device_type = "i2c";
  81                         compatible = "fsl-i2c";
  82                         reg = <3100 100>;
  83                         interrupts = <2b 0>;
  84                         interrupt-parent = <40000>;
  85                         dfsrr;
  86                 };
  87
  88                 mdio@24520 {
  89                         #address-cells = <1>;
  90                         #size-cells = <0>;
  91                         device_type = "mdio";
  92                         compatible = "gianfar";
  93                         reg = <24520 20>;
  94                         linux,phandle = <24520>;
  95                         ethernet-phy@0 {
  96                                 linux,phandle = <2452000>;
  97                                 interrupt-parent = <40000>;
  98                                 interrupts = <a 0>;
  99                                 reg = <0>;
 100                                 device_type = "ethernet-phy";
 101                         };
 102                         ethernet-phy@1 {
 103                                 linux,phandle = <2452001>;
 104                                 interrupt-parent = <40000>;
 105                                 interrupts = <a 0>;
 106                                 reg = <1>;
 107                                 device_type = "ethernet-phy";
 108                         };
 109                         ethernet-phy@2 {
 110                                 linux,phandle = <2452002>;
 111                                 interrupt-parent = <40000>;
 112                                 interrupts = <a 0>;
 113                                 reg = <2>;
 114                                 device_type = "ethernet-phy";
 115                         };
 116                         ethernet-phy@3 {
 117                                 linux,phandle = <2452003>;
 118                                 interrupt-parent = <40000>;
 119                                 interrupts = <a 0>;
 120                                 reg = <3>;
 121                                 device_type = "ethernet-phy";
 122                         };
 123                 };
 124
 125                 ethernet@24000 {
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                         device_type = "network";
 129                         model = "TSEC";
 130                         compatible = "gianfar";
 131                         reg = <24000 1000>;
 132                         address = [ 00 E0 0C 00 73 00 ];
 133                         interrupts = <1d 3 1e 3 22 3>;
 134                         interrupt-parent = <40000>;
 135                         phy-handle = <2452000>;
 136                 };
 137
 138                 ethernet@25000 {
 139                         #address-cells = <1>;
 140                         #size-cells = <0>;
 141                         device_type = "network";
 142                         model = "TSEC";
 143                         compatible = "gianfar";
 144                         reg = <25000 1000>;
 145                         address = [ 00 E0 0C 00 73 01 ];
 146                         interrupts = <23 3 24 3 28 3>;
 147                         interrupt-parent = <40000>;
 148                         phy-handle = <2452001>;
 149                 };
 150
 151                 ethernet@26000 {
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154                         device_type = "network";
 155                         model = "TSEC";
 156                         compatible = "gianfar";
 157                         reg = <26000 1000>;
 158                         address = [ 00 E0 0C 00 02 FD ];
 159                         interrupts = <1F 3 20 3 21 3>;
 160                         interrupt-parent = <40000>;
 161                         phy-handle = <2452002>;
 162                 };
 163
 164                 ethernet@27000 {
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         device_type = "network";
 168                         model = "TSEC";
 169                         compatible = "gianfar";
 170                         reg = <27000 1000>;
 171                         address = [ 00 E0 0C 00 03 FD ];
 172                         interrupts = <25 3 26 3 27 3>;
 173                         interrupt-parent = <40000>;
 174                         phy-handle = <2452003>;
 175                 };
 176                 serial@4500 {
 177                         device_type = "serial";
 178                         compatible = "ns16550";
 179                         reg = <4500 100>;       // reg base, size
 180                         clock-frequency = <0>;  // should we fill in in uboot?
 181                         interrupts = <2a 3>;
 182                         interrupt-parent = <40000>;
 183                 };
 184
 185                 serial@4600 {
 186                         device_type = "serial";
 187                         compatible = "ns16550";
 188                         reg = <4600 100>;       // reg base, size
 189                         clock-frequency = <0>;  // should we fill in in uboot?
 190                         interrupts = <2a 3>;
 191                         interrupt-parent = <40000>;
 192                 };
 193
 194                 pic@40000 {
 195                         linux,phandle = <40000>;
 196                         clock-frequency = <0>;
 197                         interrupt-controller;
 198                         #address-cells = <0>;
 199                         #interrupt-cells = <2>;
 200                         reg = <40000 40000>;
 201                         built-in;
 202                         compatible = "chrp,open-pic";
 203                         device_type = "open-pic";
 204                         big-endian;
 205                 };
 206         };
 207 };
 208