2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * SPDX-License-Identifier: GPL-2.0+
12 * Find out to which of the 2 gpio modules the pin specified in the
14 * GPIO_MODULE yields 0 for pins 0 to 31,
17 #define GPIO_MODULE(pin) ((pin) >> 5)
20 * Bit position within a 32-bit peripheral register (where every
21 * bit is one bitslice)
23 #define MASK(pin) (1 << ((pin) & 0x1F))
24 #define BASE_ADDR(mod) module_base[mod]
27 * Lookup table for transforming gpio module number 0 to 2 to
30 static u32 module_base[] = {
35 static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask)
37 reg_write(addr, (reg_read(addr) & ~and_mask) | or_mask);
40 int vct_gpio_dir(int pin, int dir)
44 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
47 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0);
49 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin));
54 void vct_gpio_set(int pin, int val)
58 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
61 clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0);
63 clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin));
66 int vct_gpio_get(int pin)
71 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
72 value = reg_read(GPIO_EXT_PORTA(gpio_base));
74 return ((value & MASK(pin)) ? 1 : 0);