2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/onenand.h>
26 #define BURST_SIZE_WORDS 4
28 static u16 ebi_nand_read_word(void __iomem *addr)
30 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_2 | (u32)addr));
33 return reg_read(EBI_IO_ACCS_DATA(EBI_BASE)) >> 16;
36 static void ebi_nand_write_word(u16 data, void __iomem * addr)
39 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16));
40 reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
41 EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | (u32)addr);
46 * EBI initialization for OneNAND FLASH access
48 int ebi_init_onenand(void)
50 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000);
52 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002);
53 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50);
55 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002);
56 reg_write(EBI_DEV3_CONFIG2(EBI_BASE), 0x0); /* byte/word ordering */
58 reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x00504000);
59 reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0x00001000);
60 reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x12002223);
61 reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC02220);
62 reg_write(EBI_DEV3_TIM1_RD1(EBI_BASE), 0x00504000);
63 reg_write(EBI_DEV3_TIM1_RD2(EBI_BASE), 0x00001000);
64 reg_write(EBI_DEV3_TIM1_WR1(EBI_BASE), 0x05001000);
65 reg_write(EBI_DEV3_TIM1_WR2(EBI_BASE), 0x00010200);
67 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000);
68 reg_write(EBI_DEV2_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
70 reg_write(EBI_DEV3_TIM_EXT(EBI_BASE), 0xFFF00000);
71 reg_write(EBI_DEV3_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
73 /* prepare DMA configuration for EBI */
74 reg_write(EBI_DEV3_FIFO_CONFIG(EBI_BASE), 0x0101ff00);
76 /* READ only no byte order change, TAG 1 used */
77 reg_write(EBI_DEV3_DMA_CONFIG2(EBI_BASE), 0x00000004);
79 reg_write(EBI_TAG1_SYS_ID(EBI_BASE), 0x0); /* SCC DMA channel 0 */
80 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1);
81 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2);
82 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3);
87 static void *memcpy_16_from_onenand(void *dst, const void *src, unsigned int len)
95 *d++ = ebi_nand_read_word(s++);
100 static void *memcpy_32_from_onenand(void *dst, const void *src, unsigned int len)
105 u32 bytes_per_block = BURST_SIZE_WORDS * sizeof(int);
106 u32 n_blocks = len / bytes_per_block;
110 for (block = 0; block < n_blocks; block++) {
111 /* Trigger read channel 3 */
112 reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
113 (EXT_DEVICE_CHANNEL_3 | (s + (block * bytes_per_block))));
114 /* Poll status to see whether read has finished */
117 /* Squirrel the data away in a safe place */
118 for (burst_word = 0; burst_word < BURST_SIZE_WORDS; burst_word++)
119 *d++ = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
125 static void *memcpy_16_to_onenand(void *dst, const void *src, unsigned int len)
133 ebi_nand_write_word(*s++, d++);
138 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
140 struct onenand_chip *this = mtd->priv;
142 if (ONENAND_CURRENT_BUFFERRAM(this)) {
143 if (area == ONENAND_DATARAM)
144 return mtd->writesize;
145 if (area == ONENAND_SPARERAM)
152 static int ebi_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
153 unsigned char *buffer, int offset,
156 struct onenand_chip *this = mtd->priv;
157 void __iomem *bufferram;
159 bufferram = this->base + area;
160 bufferram += onenand_bufferram_offset(mtd, area);
163 memcpy_16_from_onenand(buffer, bufferram + offset, count);
165 memcpy_32_from_onenand(buffer, bufferram + offset, count);
170 static int ebi_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
171 const unsigned char *buffer, int offset,
174 struct onenand_chip *this = mtd->priv;
175 void __iomem *bufferram;
177 bufferram = this->base + area;
178 bufferram += onenand_bufferram_offset(mtd, area);
180 memcpy_16_to_onenand(bufferram + offset, buffer, count);
185 void onenand_board_init(struct mtd_info *mtd)
187 struct onenand_chip *chip = mtd->priv;
190 * Insert board specific OneNAND access functions
192 chip->read_word = ebi_nand_read_word;
193 chip->write_word = ebi_nand_write_word;
195 chip->read_bufferram = ebi_read_bufferram;
196 chip->write_bufferram = ebi_write_bufferram;