3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com.
7 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
8 * Michael Jones, Matrix Vision GmbH, michael.jones@matrix-vision.de
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <linux/byteorder/generic.h>
38 #define fpga_debug(fmt, args...) printf("%s: "fmt, __func__, ##args)
40 #define fpga_debug(fmt, args...)
43 Altera_CYC2_Passive_Serial_fns altera_fns = {
44 fpga_null_fn, /* Altera_pre_fn */
53 Altera_desc cyclone2 = {
55 fast_passive_parallel,
64 #define GPIO_nSTATUS 157
65 #define GPIO_CONF_DONE 158
66 #define GPIO_nCONFIG 159
76 DECLARE_GLOBAL_DATA_PTR;
78 /* return FPGA_SUCCESS on success, else FPGA_FAIL
80 int mvblx_init_fpga(void)
82 fpga_debug("Initializing FPGA interface\n");
84 fpga_add(fpga_altera, &cyclone2);
86 if (gpio_request(GPIO_DCLK, "dclk") ||
87 gpio_request(GPIO_nSTATUS, "nStatus") ||
88 #ifndef CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
89 gpio_request(GPIO_CONF_DONE, "conf_done") ||
91 gpio_request(GPIO_nCONFIG, "nConfig") ||
92 gpio_request(GPIO_DATA0, "data0") ||
93 gpio_request(GPIO_DATA1, "data1") ||
94 gpio_request(GPIO_DATA2, "data2") ||
95 gpio_request(GPIO_DATA3, "data3") ||
96 gpio_request(GPIO_DATA4, "data4") ||
97 gpio_request(GPIO_DATA5, "data5") ||
98 gpio_request(GPIO_DATA6, "data6") ||
99 gpio_request(GPIO_DATA7, "data7")) {
100 printf("%s: error requesting GPIOs.", __func__);
105 gpio_direction_output(GPIO_DCLK, 0);
106 gpio_direction_output(GPIO_nCONFIG, 0);
107 gpio_direction_output(GPIO_DATA0, 0);
108 gpio_direction_output(GPIO_DATA1, 0);
109 gpio_direction_output(GPIO_DATA2, 0);
110 gpio_direction_output(GPIO_DATA3, 0);
111 gpio_direction_output(GPIO_DATA4, 0);
112 gpio_direction_output(GPIO_DATA5, 0);
113 gpio_direction_output(GPIO_DATA6, 0);
114 gpio_direction_output(GPIO_DATA7, 0);
116 /* NB omap_free_gpio() resets to an input, so we can't
117 * free ie. nCONFIG, or else the FPGA would reset
118 * Q: presumably gpio_free() has the same effect?
122 gpio_direction_input(GPIO_nSTATUS);
123 #ifndef CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
124 gpio_direction_input(GPIO_CONF_DONE);
127 fpga_config_fn(0, 1, 0);
133 int fpga_null_fn(int cookie)
138 int fpga_config_fn(int assert, int flush, int cookie)
140 fpga_debug("SET config : %s=%d\n", assert ? "low" : "high", assert);
142 gpio_set_value(GPIO_nCONFIG, !assert);
144 gpio_set_value(GPIO_nCONFIG, assert);
150 int fpga_done_fn(int cookie)
154 /* since revA of BLX, we will not get this signal. */
156 #ifdef CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
157 fpga_debug("not waiting for CONF_DONE.");
160 fpga_debug("CONF_DONE check ... ");
161 if (gpio_get_value(GPIO_CONF_DONE)) {
162 fpga_debug("high\n");
166 gpio_free(GPIO_CONF_DONE);
172 int fpga_status_fn(int cookie)
175 fpga_debug("STATUS check ... ");
177 result = gpio_get_value(GPIO_nSTATUS);
180 fpga_debug("error\n");
182 fpga_debug("high\n");
189 static inline int _write_fpga(u8 byte)
191 gpio_set_value(GPIO_DATA0, byte & 0x01);
192 gpio_set_value(GPIO_DATA1, (byte >> 1) & 0x01);
193 gpio_set_value(GPIO_DATA2, (byte >> 2) & 0x01);
194 gpio_set_value(GPIO_DATA3, (byte >> 3) & 0x01);
195 gpio_set_value(GPIO_DATA4, (byte >> 4) & 0x01);
196 gpio_set_value(GPIO_DATA5, (byte >> 5) & 0x01);
197 gpio_set_value(GPIO_DATA6, (byte >> 6) & 0x01);
198 gpio_set_value(GPIO_DATA7, (byte >> 7) & 0x01);
201 gpio_set_value(GPIO_DCLK, 1);
203 gpio_set_value(GPIO_DCLK, 0);
209 int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie)
211 unsigned char *data = (unsigned char *) buf;
213 int headerlen = len - cyclone2.size;
217 else if (headerlen == sizeof(uint32_t)) {
218 const unsigned int fpgavers_len = 11; /* '0x' + 8 hex digits + \0 */
219 char fpgavers_str[fpgavers_len];
220 snprintf(fpgavers_str, fpgavers_len, "0x%08x",
221 be32_to_cpup((uint32_t*)data));
222 setenv("fpgavers", fpgavers_str);
225 fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
226 for (i = headerlen; i < len; i++)
227 _write_fpga(data[i]);
228 fpga_debug("-%s\n", __func__);