7499d2078b718cd4567a07c14cc6e79b1db6ae2c
[oweals/u-boot.git] / board / keymile / kmp204x / eth.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2013 Keymile AG
4  * Valentin Longchamp <valentin.longchamp@keymile.com>
5  */
6
7 #include <common.h>
8 #include <netdev.h>
9 #include <fm_eth.h>
10 #include <fsl_mdio.h>
11 #include <phy.h>
12
13 int board_eth_init(bd_t *bis)
14 {
15         int ret = 0;
16 #ifdef CONFIG_FMAN_ENET
17         struct fsl_pq_mdio_info dtsec_mdio_info;
18
19         printf("Initializing Fman\n");
20
21         dtsec_mdio_info.regs =
22                 (struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
23         dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
24
25         /* Register the real 1G MDIO bus */
26         fsl_pq_mdio_init(bis, &dtsec_mdio_info);
27
28         /* DTESC1/2 don't have a PHY, they are temporarily disabled
29          * so that u-boot doesn't try to unsuccessfuly enable them */
30         fm_disable_port(FM1_DTSEC1);
31         fm_disable_port(FM1_DTSEC2);
32
33         /*
34          * Program RGMII DTSEC5 (FM1 MAC5) on the EC2 physical itf
35          * This is the debug interface, the only one used in u-boot
36          */
37         fm_info_set_phy_address(FM1_DTSEC5, CONFIG_SYS_FM1_DTSEC5_PHY_ADDR);
38         fm_info_set_mdio(FM1_DTSEC5,
39                          miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
40
41         ret = cpu_eth_init(bis);
42
43         /* reenable DTSEC1/2 for later (kernel) */
44         fm_enable_port(FM1_DTSEC1);
45         fm_enable_port(FM1_DTSEC2);
46 #endif
47
48         return ret;
49 }
50
51 #if defined(CONFIG_PHYLIB) && defined(CONFIG_PHY_MARVELL)
52
53 #define mv88E1118_PAGE_REG      22
54
55 int board_phy_config(struct phy_device *phydev)
56 {
57         if (phydev->addr == CONFIG_SYS_FM1_DTSEC5_PHY_ADDR) {
58                 /* driver config is good */
59                 if (phydev->drv->config)
60                         phydev->drv->config(phydev);
61
62                 /* but we still need to fix the LEDs */
63                 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0003);
64                 phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x0840);
65                 phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0000);
66         }
67
68         return 0;
69 }
70 #endif