3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
15 * Philippe Robin, <philippe.robin@arm.com>
17 * See file CREDITS for list of people who contributed to this
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
39 DECLARE_GLOBAL_DATA_PTR;
41 void flash__init (void);
42 void ether__init (void);
43 void peripheral_power_enable (void);
45 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
46 void show_boot_progress(int progress)
48 printf("Boot reached stage %d\n", progress);
52 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
55 * Miscellaneous platform dependent initialisations
60 /* arch number of Integrator Board */
61 gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
63 /* adress of boot parameters */
64 gd->bd->bi_boot_params = 0x00000100;
68 #ifdef CONFIG_CM_REMAP
69 extern void cm_remap(void);
70 cm_remap(); /* remaps writeable memory to 0x00000000 */
81 int misc_init_r (void)
83 setenv("verify", "n");
87 /******************************
90 ******************************/
91 void flash__init (void)
94 /*************************************************************
96 Description: take the Ethernet controller out of reset and wait
97 for the EEPROM load to complete.
98 *************************************************************/
99 void ether__init (void)
103 /******************************
106 ******************************/
109 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
110 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
112 #ifdef CONFIG_CM_SPD_DETECT
114 extern void dram_query(void);
115 unsigned long cm_reg_sdram;
116 unsigned long sdram_shift;
118 dram_query(); /* Assembler accesses to CM registers */
119 /* Queries the SPD values */
121 /* Obtain the SDRAM size from the CM SDRAM register */
123 cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
124 /* Register SDRAM size
126 * 0xXXXXXXbbb000bb 16 MB
127 * 0xXXXXXXbbb001bb 32 MB
128 * 0xXXXXXXbbb010bb 64 MB
129 * 0xXXXXXXbbb011bb 128 MB
130 * 0xXXXXXXbbb100bb 256 MB
133 sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
134 gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
137 #endif /* CM_SPD_DETECT */
142 /* The Integrator/CP timer1 is clocked at 1MHz
143 * can be divided by 16 or 256
144 * and can be set up as a 32-bit timer
146 /* U-Boot expects a 32 bit timer, running at CFG_HZ */
147 /* Keep total timer count to avoid losing decrements < div_timer */
148 static unsigned long long total_count = 0;
149 static unsigned long long lastdec; /* Timer reading at last call */
150 static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
151 static unsigned long long div_timer = 1; /* Divisor to convert timer reading
152 * change to U-Boot ticks
154 /* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
155 static ulong timestamp; /* U-Boot ticks since startup */
157 #define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
158 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
160 /* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
161 * - unless otherwise stated
164 /* starts up a counter
165 * - the Integrator/CP timer can be set up to issue an interrupt */
166 int interrupt_init (void)
168 /* Load timer with initial value */
169 *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
175 * divider 1 00 == less rounding error
179 *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
180 /* init the timestamp */
182 reset_timer_masked();
184 div_timer = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
185 div_timer /= div_clock;
191 * timer without interrupts
193 void reset_timer (void)
195 reset_timer_masked ();
198 ulong get_timer (ulong base_ticks)
200 return get_timer_masked () - base_ticks;
203 void set_timer (ulong ticks)
206 total_count = (unsigned long long)ticks * div_timer;
209 /* delay usec useconds */
210 void udelay (unsigned long usec)
214 /* Convert to U-Boot ticks */
218 tmp = get_timer_masked(); /* get current timestamp */
219 tmo += tmp; /* form target timestamp */
221 while (get_timer_masked () < tmo) {/* loop till event */
226 void reset_timer_masked (void)
228 /* capure current decrementer value */
229 lastdec = (unsigned long long)READ_TIMER;
230 /* start "advancing" time stamp from 0 */
234 /* converts the timer reading to U-Boot ticks */
235 /* the timestamp is the number of ticks since reset */
236 ulong get_timer_masked (void)
238 /* get current count */
239 unsigned long long now = (unsigned long long)READ_TIMER;
242 /* Must have wrapped */
243 total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
245 total_count += lastdec - now;
251 do_div(now, div_timer);
257 /* waits specified delay value and resets timestamp */
258 void udelay_masked (unsigned long usec)
264 * This function is derived from PowerPC code (read timebase as long long).
265 * On ARM it just returns the timer value.
267 unsigned long long get_ticks(void)
269 return (unsigned long long)get_timer(0);
273 * Return the timebase clock frequency
274 * i.e. how often the timer decrements
276 ulong get_tbclk (void)
278 return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);