board: gdsys: Add osdsize command
[oweals/u-boot.git] / board / gdsys / common / osd.c
1 /*
2  * (C) Copyright 2010
3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #include <common.h>
9 #include <i2c.h>
10 #include <malloc.h>
11
12 #include "ch7301.h"
13 #include "dp501.h"
14 #include <gdsys_fpga.h>
15
16 #define ICS8N3QV01_I2C_ADDR 0x6E
17 #define ICS8N3QV01_FREF 114285000
18 #define ICS8N3QV01_FREF_LL 114285000LL
19 #define ICS8N3QV01_F_DEFAULT_0 156250000LL
20 #define ICS8N3QV01_F_DEFAULT_1 125000000LL
21 #define ICS8N3QV01_F_DEFAULT_2 100000000LL
22 #define ICS8N3QV01_F_DEFAULT_3  25175000LL
23
24 #define SIL1178_MASTER_I2C_ADDRESS 0x38
25 #define SIL1178_SLAVE_I2C_ADDRESS 0x39
26
27 #define DP501_I2C_ADDR 0x08
28
29 #define PIXCLK_640_480_60 25180000
30 #define MAX_X_CHARS 53
31 #define MAX_Y_CHARS 26
32
33 #ifdef CONFIG_SYS_OSD_DH
34 #define MAX_OSD_SCREEN 8
35 #define OSD_DH_BASE 4
36 #else
37 #define MAX_OSD_SCREEN 4
38 #endif
39
40 #ifdef CONFIG_SYS_OSD_DH
41 #define OSD_SET_REG(screen, fld, val) \
42         do { \
43                 if (screen >= OSD_DH_BASE) \
44                         FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
45                 else \
46                         FPGA_SET_REG(screen, osd0.fld, val); \
47         } while (0)
48 #else
49 #define OSD_SET_REG(screen, fld, val) \
50                 FPGA_SET_REG(screen, osd0.fld, val)
51 #endif
52
53 #ifdef CONFIG_SYS_OSD_DH
54 #define OSD_GET_REG(screen, fld, val) \
55         do {                                    \
56                 if (screen >= OSD_DH_BASE) \
57                         FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
58                 else \
59                         FPGA_GET_REG(screen, osd0.fld, val); \
60         } while (0)
61 #else
62 #define OSD_GET_REG(screen, fld, val) \
63                 FPGA_GET_REG(screen, osd0.fld, val)
64 #endif
65
66 unsigned int base_width;
67 unsigned int base_height;
68 size_t bufsize;
69 u16 *buf;
70
71 unsigned int osd_screen_mask = 0;
72
73 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
74 int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
75 #endif
76
77 #ifdef CONFIG_SYS_SIL1178_I2C
78 int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
79 #endif
80
81 #ifdef CONFIG_SYS_DP501_I2C
82 int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
83 #endif
84
85 #ifdef CONFIG_SYS_DP501_BASE
86 int dp501_base[] = CONFIG_SYS_DP501_BASE;
87 #endif
88
89 #ifdef CONFIG_SYS_MPC92469AC
90 static void mpc92469ac_calc_parameters(unsigned int fout,
91         unsigned int *post_div, unsigned int *feedback_div)
92 {
93         unsigned int n = *post_div;
94         unsigned int m = *feedback_div;
95         unsigned int a;
96         unsigned int b = 14745600 / 16;
97
98         if (fout < 50169600)
99                 n = 8;
100         else if (fout < 100339199)
101                 n = 4;
102         else if (fout < 200678399)
103                 n = 2;
104         else
105                 n = 1;
106
107         a = fout * n + (b / 2); /* add b/2 for proper rounding */
108
109         m = a / b;
110
111         *post_div = n;
112         *feedback_div = m;
113 }
114
115 static void mpc92469ac_set(unsigned screen, unsigned int fout)
116 {
117         unsigned int n;
118         unsigned int m;
119         unsigned int bitval = 0;
120         mpc92469ac_calc_parameters(fout, &n, &m);
121
122         switch (n) {
123         case 1:
124                 bitval = 0x00;
125                 break;
126         case 2:
127                 bitval = 0x01;
128                 break;
129         case 4:
130                 bitval = 0x02;
131                 break;
132         case 8:
133                 bitval = 0x03;
134                 break;
135         }
136
137         FPGA_SET_REG(screen, mpc3w_control, (bitval << 9) | m);
138 }
139 #endif
140
141 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
142
143 static unsigned int ics8n3qv01_get_fout_calc(unsigned index)
144 {
145         unsigned long long n;
146         unsigned long long mint;
147         unsigned long long mfrac;
148         u8 reg_a, reg_b, reg_c, reg_d, reg_f;
149         unsigned long long fout_calc;
150
151         if (index > 3)
152                 return 0;
153
154         reg_a = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0 + index);
155         reg_b = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 4 + index);
156         reg_c = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 8 + index);
157         reg_d = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 12 + index);
158         reg_f = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20 + index);
159
160         mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20);
161         mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1)
162                 | (reg_d >> 7);
163         n = reg_d & 0x7f;
164
165         fout_calc = (mint * ICS8N3QV01_FREF_LL
166                      + mfrac * ICS8N3QV01_FREF_LL / 262144LL
167                      + ICS8N3QV01_FREF_LL / 524288LL
168                      + n / 2)
169                     / n
170                     * 1000000
171                     / (1000000 - 100);
172
173         return fout_calc;
174 }
175
176
177 static void ics8n3qv01_calc_parameters(unsigned int fout,
178         unsigned int *_mint, unsigned int *_mfrac,
179         unsigned int *_n)
180 {
181         unsigned int n;
182         unsigned int foutiic;
183         unsigned int fvcoiic;
184         unsigned int mint;
185         unsigned long long mfrac;
186
187         n = (2215000000U + fout / 2) / fout;
188         if ((n & 1) && (n > 5))
189                 n -= 1;
190
191         foutiic = fout - (fout / 10000);
192         fvcoiic = foutiic * n;
193
194         mint = fvcoiic / 114285000;
195         if ((mint < 17) || (mint > 63))
196                 printf("ics8n3qv01_calc_parameters: cannot determine mint\n");
197
198         mfrac = ((unsigned long long)fvcoiic % 114285000LL) * 262144LL
199                 / 114285000LL;
200
201         *_mint = mint;
202         *_mfrac = mfrac;
203         *_n = n;
204 }
205
206 static void ics8n3qv01_set(unsigned int fout)
207 {
208         unsigned int n;
209         unsigned int mint;
210         unsigned int mfrac;
211         unsigned int fout_calc;
212         unsigned long long fout_prog;
213         long long off_ppm;
214         u8 reg0, reg4, reg8, reg12, reg18, reg20;
215
216         fout_calc = ics8n3qv01_get_fout_calc(1);
217         off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000
218                   / ICS8N3QV01_F_DEFAULT_1;
219         printf("       PLL is off by %lld ppm\n", off_ppm);
220         fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc
221                     / ICS8N3QV01_F_DEFAULT_1;
222         ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
223
224         reg0 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0) & 0xc0;
225         reg0 |= (mint & 0x1f) << 1;
226         reg0 |= (mfrac >> 17) & 0x01;
227         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 0, reg0);
228
229         reg4 = mfrac >> 9;
230         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 4, reg4);
231
232         reg8 = mfrac >> 1;
233         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 8, reg8);
234
235         reg12 = mfrac << 7;
236         reg12 |= n & 0x7f;
237         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 12, reg12);
238
239         reg18 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 18) & 0x03;
240         reg18 |= 0x20;
241         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 18, reg18);
242
243         reg20 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20) & 0x1f;
244         reg20 |= mint & (1 << 5);
245         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 20, reg20);
246 }
247 #endif
248
249 static int osd_write_videomem(unsigned screen, unsigned offset,
250         u16 *data, size_t charcount)
251 {
252         unsigned int k;
253
254         for (k = 0; k < charcount; ++k) {
255                 if (offset + k >= bufsize)
256                         return -1;
257 #ifdef CONFIG_SYS_OSD_DH
258                 if (screen >= OSD_DH_BASE)
259                         FPGA_SET_REG(screen - OSD_DH_BASE,
260                                      videomem1[offset + k], data[k]);
261                 else
262                         FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
263 #else
264                 FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
265 #endif
266         }
267
268         return charcount;
269 }
270
271 static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
272 {
273         unsigned screen;
274
275         if (argc < 5) {
276                 cmd_usage(cmdtp);
277                 return 1;
278         }
279
280         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
281                 unsigned x;
282                 unsigned y;
283                 unsigned charcount;
284                 unsigned len;
285                 u8 color;
286                 unsigned int k;
287                 char *text;
288                 int res;
289
290                 if (!(osd_screen_mask & (1 << screen)))
291                         continue;
292
293                 x = simple_strtoul(argv[1], NULL, 16);
294                 y = simple_strtoul(argv[2], NULL, 16);
295                 color = simple_strtoul(argv[3], NULL, 16);
296                 text = argv[4];
297                 charcount = strlen(text);
298                 len = (charcount > bufsize) ? bufsize : charcount;
299
300                 for (k = 0; k < len; ++k)
301                         buf[k] = (text[k] << 8) | color;
302
303                 res = osd_write_videomem(screen, y * base_width + x, buf, len);
304                 if (res < 0)
305                         return res;
306         }
307
308         return 0;
309 }
310
311 int osd_probe(unsigned screen)
312 {
313         u16 version;
314         u16 features;
315         int old_bus = i2c_get_bus_num();
316         bool pixclock_present = false;
317         bool output_driver_present = false;
318 #ifdef CONFIG_SYS_DP501_I2C
319 #ifdef CONFIG_SYS_DP501_BASE
320         uint8_t dp501_addr = dp501_base[screen];
321 #else
322         uint8_t dp501_addr = DP501_I2C_ADDR;
323 #endif
324 #endif
325
326         OSD_GET_REG(0, version, &version);
327         OSD_GET_REG(0, features, &features);
328
329         base_width = ((features & 0x3f00) >> 8) + 1;
330         base_height = (features & 0x001f) + 1;
331         bufsize = base_width * base_height;
332         buf = malloc(sizeof(u16) * bufsize);
333         if (!buf)
334                 return -1;
335
336 #ifdef CONFIG_SYS_OSD_DH
337         printf("OSD%d-%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
338                (screen >= OSD_DH_BASE) ? (screen - OSD_DH_BASE) : screen,
339                (screen > 3) ? 1 : 0, version/100, version%100, base_width,
340                base_height);
341 #else
342         printf("OSD%d:  Digital-OSD version %01d.%02d, %d" "x%d characters\n",
343                screen, version/100, version%100, base_width, base_height);
344 #endif
345         /* setup pixclock */
346
347 #ifdef CONFIG_SYS_MPC92469AC
348         pixclock_present = true;
349         mpc92469ac_set(screen, PIXCLK_640_480_60);
350 #endif
351
352 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
353         i2c_set_bus_num(ics8n3qv01_i2c[screen]);
354         if (!i2c_probe(ICS8N3QV01_I2C_ADDR)) {
355                 ics8n3qv01_set(PIXCLK_640_480_60);
356                 pixclock_present = true;
357         }
358 #endif
359
360         if (!pixclock_present)
361                 printf("       no pixelclock found\n");
362
363         /* setup output driver */
364
365 #ifdef CONFIG_SYS_CH7301_I2C
366         if (!ch7301_probe(screen, true))
367                 output_driver_present = true;
368 #endif
369
370 #ifdef CONFIG_SYS_SIL1178_I2C
371         i2c_set_bus_num(sil1178_i2c[screen]);
372         if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) {
373                 if (i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02) == 0x06) {
374                         /*
375                          * magic initialization sequence,
376                          * adapted from datasheet
377                          */
378                         i2c_reg_write(SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36);
379                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44);
380                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c);
381                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10);
382                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80);
383                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30);
384                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89);
385                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60);
386                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36);
387                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37);
388                         output_driver_present = true;
389                 }
390         }
391 #endif
392
393 #ifdef CONFIG_SYS_DP501_I2C
394         i2c_set_bus_num(dp501_i2c[screen]);
395         if (!i2c_probe(dp501_addr)) {
396                 dp501_powerup(dp501_addr);
397                 output_driver_present = true;
398         }
399 #endif
400
401         if (!output_driver_present)
402                 printf("       no output driver found\n");
403
404         OSD_SET_REG(screen, control, 0x0049);
405
406         OSD_SET_REG(screen, xy_size, ((32 - 1) << 8) | (16 - 1));
407         OSD_SET_REG(screen, x_pos, 0x007f);
408         OSD_SET_REG(screen, y_pos, 0x005f);
409
410         if (pixclock_present && output_driver_present)
411                 osd_screen_mask |= 1 << screen;
412
413         i2c_set_bus_num(old_bus);
414
415         return 0;
416 }
417
418 int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
419 {
420         unsigned screen;
421
422         if ((argc < 4) || (strlen(argv[3]) % 4)) {
423                 cmd_usage(cmdtp);
424                 return 1;
425         }
426
427         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
428                 unsigned x;
429                 unsigned y;
430                 unsigned k;
431                 u16 buffer[base_width];
432                 char *rp;
433                 u16 *wp = buffer;
434                 unsigned count = (argc > 4) ?
435                         simple_strtoul(argv[4], NULL, 16) : 1;
436
437                 if (!(osd_screen_mask & (1 << screen)))
438                         continue;
439
440                 x = simple_strtoul(argv[1], NULL, 16);
441                 y = simple_strtoul(argv[2], NULL, 16);
442                 rp = argv[3];
443
444
445                 while (*rp) {
446                         char substr[5];
447
448                         memcpy(substr, rp, 4);
449                         substr[4] = 0;
450                         *wp = simple_strtoul(substr, NULL, 16);
451
452                         rp += 4;
453                         wp++;
454                         if (wp - buffer > base_width)
455                                 break;
456                 }
457
458                 for (k = 0; k < count; ++k) {
459                         unsigned offset =
460                                 y * base_width + x + k * (wp - buffer);
461                         osd_write_videomem(screen, offset, buffer,
462                                 wp - buffer);
463                 }
464         }
465
466         return 0;
467 }
468
469 int osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
470 {
471         unsigned screen;
472         unsigned x;
473         unsigned y;
474
475         if (argc < 3) {
476                 cmd_usage(cmdtp);
477                 return 1;
478         }
479
480         x = simple_strtoul(argv[1], NULL, 16);
481         y = simple_strtoul(argv[2], NULL, 16);
482
483         if (!x || (x > 64) || (x > MAX_X_CHARS) ||
484             !y || (y > 32) || (y > MAX_Y_CHARS)) {
485                 cmd_usage(cmdtp);
486                 return 1;
487         }
488
489         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
490                 OSD_SET_REG(screen, xy_size, ((x - 1) << 8) | (y - 1));
491                 OSD_SET_REG(screen, x_pos, 32767 * (640 - 12 * x) / 65535);
492                 OSD_SET_REG(screen, y_pos, 32767 * (480 - 18 * y) / 65535);
493         }
494
495         return 0;
496 }
497
498 U_BOOT_CMD(
499         osdw, 5, 0, osd_write,
500         "write 16-bit hex encoded buffer to osd memory",
501         "pos_x pos_y buffer count\n"
502 );
503
504 U_BOOT_CMD(
505         osdp, 5, 0, osd_print,
506         "write ASCII buffer to osd memory",
507         "pos_x pos_y color text\n"
508 );
509
510 U_BOOT_CMD(
511         osdsize, 3, 0, osd_size,
512         "set OSD XY size in characters",
513         "size_x(max. " __stringify(MAX_X_CHARS)
514         ") size_y(max. " __stringify(MAX_Y_CHARS) ")\n"
515 );