board/gateworks/gw_ventana/gsc.h

   1 /*
   2  * Copyright (C) 2013 Gateworks Corporation
   3  *
   4  * Author: Tim Harvey <tharvey@gateworks.com>
   5  *
   6  * SPDX-License-Identifier: GPL-2.0+
   7  */
   8
   9 #ifndef __ASSEMBLY__
  10
  11 /* i2c slave addresses */
  12 #define GSC_SC_ADDR             0x20
  13 #define GSC_RTC_ADDR            0x68
  14 #define GSC_HWMON_ADDR          0x29
  15 #define GSC_EEPROM_ADDR         0x51
  16
  17 /* System Controller registers */
  18 enum {
  19         GSC_SC_CTRL0            = 0x00,
  20         GSC_SC_CTRL1            = 0x01,
  21         GSC_SC_STATUS           = 0x0a,
  22         GSC_SC_FWCRC            = 0x0c,
  23         GSC_SC_FWVER            = 0x0e,
  24 };
  25
  26 /* System Controller Control1 bits */
  27 enum {
  28         GSC_SC_CTRL1_WDTIME     = 4, /* 1 = 60s timeout, 0 = 30s timeout */
  29         GSC_SC_CTRL1_WDEN       = 5, /* 1 = enable, 0 = disable */
  30         GSC_SC_CTRL1_WDDIS      = 7, /* 1 = disable boot watchdog */
  31 };
  32
  33 /* System Controller Interrupt bits */
  34 enum {
  35         GSC_SC_IRQ_PB           = 0, /* Pushbutton switch */
  36         GSC_SC_IRQ_SECURE       = 1, /* Secure Key erase operation complete */
  37         GSC_SC_IRQ_EEPROM_WP    = 2, /* EEPROM write violation */
  38         GSC_SC_IRQ_GPIO         = 4, /* GPIO change */
  39         GSC_SC_IRQ_TAMPER       = 5, /* Tamper detect */
  40         GSC_SC_IRQ_WATCHDOG     = 6, /* Watchdog trip */
  41         GSC_SC_IRQ_PBLONG       = 7, /* Pushbutton long hold */
  42 };
  43
  44 /* Hardware Monitor registers */
  45 enum {
  46         GSC_HWMON_TEMP          = 0x00,
  47         GSC_HWMON_VIN           = 0x02,
  48         GSC_HWMON_VDD_3P3       = 0x05,
  49         GSC_HWMON_VBATT         = 0x08,
  50         GSC_HWMON_VDD_5P0       = 0x0b,
  51         GSC_HWMON_VDD_CORE      = 0x0e,
  52         GSC_HWMON_VDD_HIGH      = 0x14,
  53         GSC_HWMON_VDD_DDR       = 0x17,
  54         GSC_HWMON_VDD_SOC       = 0x11,
  55         GSC_HWMON_VDD_1P8       = 0x1d,
  56         GSC_HWMON_VDD_IO2       = 0x20,
  57         GSC_HWMON_VDD_2P5       = 0x23,
  58         GSC_HWMON_VDD_IO3       = 0x26,
  59         GSC_HWMON_VDD_IO4       = 0x29,
  60 };
  61
  62 /*
  63  * I2C transactions to the GSC are done via these functions which
  64  * perform retries in the case of a busy GSC NAK'ing the transaction
  65  */
  66 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
  67 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
  68 int gsc_info(int verbose);
  69 #endif
  70