2 * Copyright 2014 Freescale Semiconductor
4 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
6 * SPDX-License-Identifier: GPL-2.0+
8 * This file provides support for the board-specific CPLD used on some Freescale
11 * The following macros need to be defined:
13 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the
24 u8 cpld_read(unsigned int reg)
26 void *p = (void *)CONFIG_SYS_CPLD_BASE;
31 void cpld_write(unsigned int reg, u8 value)
33 void *p = (void *)CONFIG_SYS_CPLD_BASE;
35 out_8(p + reg, value);
39 * Set the boot bank to the alternate bank
41 void cpld_set_altbank(void)
43 u8 val, curbank, altbank, override;
45 val = CPLD_READ(vbank);
46 curbank = val & CPLD_BANK_SEL_MASK;
49 case CPLD_SELECT_BANK0:
50 altbank = CPLD_SELECT_BANK4;
51 CPLD_WRITE(vbank, altbank);
52 override = CPLD_READ(software_on);
53 CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
54 CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
56 case CPLD_SELECT_BANK4:
57 altbank = CPLD_SELECT_BANK0;
58 CPLD_WRITE(vbank, altbank);
59 override = CPLD_READ(software_on);
60 CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
61 CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
64 printf("CPLD Altbank Fail: Invalid value!\n");
70 * Set the boot bank to the default bank
72 void cpld_set_defbank(void)
76 val = CPLD_DEFAULT_BANK;
78 CPLD_WRITE(global_reset, val);
82 static void cpld_dump_regs(void)
84 printf("chip_id1 = 0x%02x\n", CPLD_READ(chip_id1));
85 printf("chip_id2 = 0x%02x\n", CPLD_READ(chip_id2));
86 printf("sw_maj_ver = 0x%02x\n", CPLD_READ(sw_maj_ver));
87 printf("sw_min_ver = 0x%02x\n", CPLD_READ(sw_min_ver));
88 printf("hw_ver = 0x%02x\n", CPLD_READ(hw_ver));
89 printf("software_on = 0x%02x\n", CPLD_READ(software_on));
90 printf("cfg_rcw_src = 0x%02x\n", CPLD_READ(cfg_rcw_src));
91 printf("res0 = 0x%02x\n", CPLD_READ(res0));
92 printf("vbank = 0x%02x\n", CPLD_READ(vbank));
93 printf("sw1_sysclk = 0x%02x\n", CPLD_READ(sw1_sysclk));
94 printf("sw2_status = 0x%02x\n", CPLD_READ(sw2_status));
95 printf("sw3_status = 0x%02x\n", CPLD_READ(sw3_status));
96 printf("sw4_status = 0x%02x\n", CPLD_READ(sw4_status));
97 printf("sys_reset = 0x%02x\n", CPLD_READ(sys_reset));
98 printf("global_reset = 0x%02x\n", CPLD_READ(global_reset));
99 printf("res1 = 0x%02x\n", CPLD_READ(res1));
104 #ifndef CONFIG_SPL_BUILD
105 int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
110 return cmd_usage(cmdtp);
112 if (strcmp(argv[1], "reset") == 0) {
113 if (strcmp(argv[2], "altbank") == 0)
118 } else if (strcmp(argv[1], "dump") == 0) {
122 rc = cmd_usage(cmdtp);
128 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
129 "Reset the board or alternate bank",
130 "reset - reset to default bank\n"
131 "cpld reset altbank - reset to alternate bank\n"
133 "cpld dump - display the CPLD registers\n"