env: Rename some other getenv()-related functions
[oweals/u-boot.git] / board / freescale / t104xrdb / t104xrdb.c
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <common.h>
8 #include <command.h>
9 #include <hwconfig.h>
10 #include <netdev.h>
11 #include <linux/compiler.h>
12 #include <asm/mmu.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/immap_85xx.h>
16 #include <asm/fsl_fdt.h>
17 #include <asm/fsl_law.h>
18 #include <asm/fsl_serdes.h>
19 #include <asm/fsl_liodn.h>
20 #include <fm_eth.h>
21 #include "../common/sleep.h"
22 #include "t104xrdb.h"
23 #include "cpld.h"
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 int checkboard(void)
28 {
29         struct cpu_type *cpu = gd->arch.cpu;
30         u8 sw;
31
32 #if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
33         printf("Board: %sD4RDB\n", cpu->name);
34 #else
35         printf("Board: %sRDB\n", cpu->name);
36 #endif
37         printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
38                CPLD_READ(hw_ver), CPLD_READ(sw_ver));
39
40         sw = CPLD_READ(flash_ctl_status);
41         sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
42
43         printf("vBank: %d\n", sw);
44
45         return 0;
46 }
47
48 int board_early_init_f(void)
49 {
50 #if defined(CONFIG_DEEP_SLEEP)
51         if (is_warm_boot())
52                 fsl_dp_disable_console();
53 #endif
54
55         return 0;
56 }
57
58 int board_early_init_r(void)
59 {
60 #ifdef CONFIG_SYS_FLASH_BASE
61         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
62         int flash_esel = find_tlb_idx((void *)flashbase, 1);
63
64         /*
65          * Remap Boot flash region to caching-inhibited
66          * so that flash can be erased properly.
67          */
68
69         /* Flush d-cache and invalidate i-cache of any FLASH data */
70         flush_dcache();
71         invalidate_icache();
72
73         if (flash_esel == -1) {
74                 /* very unlikely unless something is messed up */
75                 puts("Error: Could not find TLB for FLASH BASE\n");
76                 flash_esel = 2; /* give our best effort to continue */
77         } else {
78                 /* invalidate existing TLB entry for flash */
79                 disable_tlb(flash_esel);
80         }
81
82         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
83                 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
84                 0, flash_esel, BOOKE_PAGESZ_256M, 1);
85 #endif
86         return 0;
87 }
88
89 int misc_init_r(void)
90 {
91         ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
92         u32 srds_s1;
93
94         srds_s1 = in_be32(&gur->rcwsr[4]) >> 24;
95
96         printf("SERDES Reference : 0x%X\n", srds_s1);
97
98         /* select SGMII*/
99         if (srds_s1 == 0x86)
100                 CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
101                                          MISC_CTL_SG_SEL);
102
103         /* select SGMII and Aurora*/
104         if (srds_s1 == 0x8E)
105                 CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
106                                          MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL);
107
108 #if defined(CONFIG_TARGET_T1040D4RDB)
109         if (hwconfig("qe-tdm")) {
110                 CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) |
111                            MISC_MUX_QE_TDM);
112                 printf("QECSR : 0x%02x, mux to qe-tdm\n",
113                        CPLD_READ(sfp_ctl_status));
114         }
115         /* Mask all CPLD interrupt sources, except QSGMII interrupts */
116         if (CPLD_READ(sw_ver) < 0x03) {
117                 debug("CPLD SW version 0x%02x doesn't support int_mask\n",
118                       CPLD_READ(sw_ver));
119         } else {
120                 CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL &
121                            ~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2));
122         }
123 #endif
124
125         return 0;
126 }
127
128 int ft_board_setup(void *blob, bd_t *bd)
129 {
130         phys_addr_t base;
131         phys_size_t size;
132
133         ft_cpu_setup(blob, bd);
134
135         base = env_get_bootm_low();
136         size = env_get_bootm_size();
137
138         fdt_fixup_memory(blob, (u64)base, (u64)size);
139
140 #ifdef CONFIG_PCI
141         pci_of_setup(blob, bd);
142 #endif
143
144         fdt_fixup_liodn(blob);
145
146 #ifdef CONFIG_HAS_FSL_DR_USB
147         fsl_fdt_fixup_dr_usb(blob, bd);
148 #endif
149
150 #ifdef CONFIG_SYS_DPAA_FMAN
151         fdt_fixup_fman_ethernet(blob);
152 #endif
153
154         if (hwconfig("qe-tdm"))
155                 fdt_del_diu(blob);
156         return 0;
157 }