2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 dimm_params_t ddr_raw_timing = {
12 .rank_density = 2147483648u,
13 .capacity = 4294967296u,
14 .primary_sdram_width = 64,
20 .n_banks_per_sdram_device = 8,
21 .edc_config = 2, /* ECC */
22 .burst_lengths_bitmask = 0x0c,
25 .caslat_x = 0x2fe << 4, /* 5,6,7,8,9,10,11,13 */
36 .refresh_rate_ps = 7800000,
40 struct board_specific_parameters {
42 u32 datarate_mhz_high;
54 * These tables contain all valid speeds we want to override with board
55 * specific parameters. datarate_mhz_high values need to be in ascending order
56 * for each n_ranks group.
59 static const struct board_specific_parameters udimm0[] = {
62 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
63 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
65 {2, 1066, 4, 8, 4, 0x05070609, 0x08090a08, 0xff, 2, 0},
66 {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a, 0xff, 2, 0},
67 {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09, 0xff, 2, 0},
68 {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b, 0xff, 2, 0},
69 {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a, 0xff, 2, 0},
73 static const struct board_specific_parameters *udimms[] = {