1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
8 struct board_specific_parameters {
10 u32 datarate_mhz_high;
19 * These tables contain all valid speeds we want to override with board
20 * specific parameters. datarate_mhz_high values need to be in ascending order
21 * for each n_ranks group.
24 static const struct board_specific_parameters udimm0[] = {
27 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl |
28 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 |
30 #ifdef CONFIG_SYS_FSL_DDR4
31 {2, 1666, 0, 8, 7, 0x0808090B, 0x0C0D0E0A,},
32 {2, 1900, 0, 8, 6, 0x08080A0C, 0x0D0E0F0A,},
33 {1, 1666, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
34 {1, 1900, 0, 8, 6, 0x08080A0C, 0x0D0E0F0A,},
35 {1, 2200, 0, 8, 7, 0x08090A0D, 0x0F0F100C,},
36 #elif defined(CONFIG_SYS_FSL_DDR3)
37 {2, 833, 0, 8, 6, 0x06060607, 0x08080807,},
38 {2, 1350, 0, 8, 7, 0x0708080A, 0x0A0B0C09,},
39 {2, 1666, 0, 8, 7, 0x0808090B, 0x0C0D0E0A,},
40 {1, 833, 0, 8, 6, 0x06060607, 0x08080807,},
41 {1, 1350, 0, 8, 7, 0x0708080A, 0x0A0B0C09,},
42 {1, 1666, 0, 8, 7, 0x0808090B, 0x0C0D0E0A,},
44 #error DDR type not defined
49 static const struct board_specific_parameters *udimms[] = {