1 # single-source clock:Sys_Clock = DDR_Refclock = Diff_Sysclk = 100 MHz
2 # Core/DDR/Platform/FMan = 1400MHz/1600MT/s/400MHz/700MHz
4 # PBL preamble and RCW header for T1024QDS
7 0810000e 00000000 00000000 00000000
8 37800001 00000012 e8104000 21000000
9 00000000 00000000 00000000 00030810
10 00000000 036c5a00 00000000 00000006