1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2007,2009-2014 Freescale Semiconductor, Inc.
12 #include <asm/processor.h>
14 #include <asm/fsl_pci.h>
16 #include <linux/libfdt.h>
17 #include <fdt_support.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 static void *get_fdt_virt(void)
27 return (void *)CONFIG_SYS_TMPVIRT;
30 static uint64_t get_fdt_phys(void)
32 return (uint64_t)(uintptr_t)gd->fdt_blob;
35 static void map_fdt_as(int esel)
37 u32 mas0, mas1, mas2, mas3, mas7;
38 uint64_t fdt_phys = get_fdt_phys();
39 unsigned long fdt_phys_tlb = fdt_phys & ~0xffffful;
40 unsigned long fdt_virt_tlb = (ulong)get_fdt_virt() & ~0xffffful;
42 mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(esel);
43 mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
44 mas2 = FSL_BOOKE_MAS2(fdt_virt_tlb, 0);
45 mas3 = FSL_BOOKE_MAS3(fdt_phys_tlb, 0, MAS3_SW|MAS3_SR);
46 mas7 = FSL_BOOKE_MAS7(fdt_phys_tlb);
48 write_tlb(mas0, mas1, mas2, mas3, mas7);
51 uint64_t get_phys_ccsrbar_addr_early(void)
53 void *fdt = get_fdt_virt();
60 * To be able to read the FDT we need to create a temporary TLB
64 node = fdt_path_offset(fdt, "/soc");
65 naddr = fdt_address_cells(fdt, node);
66 prop = fdt_getprop(fdt, node, "ranges", &size);
67 r = fdt_translate_address(fdt, node, prop + naddr);
73 int board_early_init_f(void)
83 static int pci_map_region(void *fdt, int pci_node, int range_id,
84 phys_size_t *ppaddr, pci_addr_t *pvaddr,
85 pci_size_t *psize, ulong *pmap_addr)
92 r = fdt_read_range(fdt, pci_node, range_id, NULL, &addr, &size);
104 map_addr = *pmap_addr;
107 map_addr += size - 1;
108 map_addr &= ~(size - 1);
110 if (map_addr + size >= CONFIG_SYS_PCI_MAP_END)
113 /* Map virtual memory for range */
114 assert(!tlb_map_range(map_addr, addr, size, TLB_MAP_IO));
115 *pmap_addr = map_addr + size;
123 void pci_init_board(void)
125 struct pci_controller *pci_hoses;
126 void *fdt = get_fdt_virt();
134 /* Start MMIO and PIO range maps above RAM */
135 map_addr = CONFIG_SYS_PCI_MAP_START;
137 /* Count and allocate PCI buses */
138 pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
139 "device_type", "pci", 4);
140 while (pci_node != -FDT_ERR_NOTFOUND) {
141 pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
142 "device_type", "pci", 4);
147 pci_hoses = malloc(sizeof(struct pci_controller) * pci_count);
149 printf("PCI: disabled\n\n");
153 /* Spawn PCI buses based on device tree */
154 pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
155 "device_type", "pci", 4);
156 while (pci_node != -FDT_ERR_NOTFOUND) {
157 struct fsl_pci_info pci_info = { };
161 reg = fdt_getprop(fdt, pci_node, "reg", NULL);
162 pci_info.regs = fdt_translate_address(fdt, pci_node, reg);
165 r = pci_map_region(fdt, pci_node, 0, &pci_info.mem_phys, NULL,
166 &pci_info.mem_size, &map_addr);
171 r = pci_map_region(fdt, pci_node, 1, &pci_info.io_phys, NULL,
172 &pci_info.io_size, &map_addr);
177 * The PCI framework finds virtual addresses for the buses
178 * through our address map, so tell it the physical addresses.
180 pci_info.mem_bus = pci_info.mem_phys;
181 pci_info.io_bus = pci_info.io_phys;
184 pci_info.pci_num = pci_num + 1;
186 fsl_setup_hose(&pci_hoses[pci_num], pci_info.regs);
187 printf("PCI: base address %lx\n", pci_info.regs);
189 fsl_pci_init_port(&pci_info, &pci_hoses[pci_num], pci_num);
191 /* Jump to next PCI node */
192 pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
193 "device_type", "pci", 4);
200 int last_stage_init(void)
202 void *fdt = get_fdt_virt();
204 const uint64_t *prop;
207 chosen = fdt_path_offset(fdt, "/chosen");
209 printf("Couldn't find /chosen node in fdt\n");
214 prop = fdt_getprop(fdt, chosen, "qemu,boot-kernel", &len);
215 if (prop && (len >= 8))
216 env_set_hex("qemu_kernel_addr", *prop);
218 /* Give the user a variable for the host fdt */
219 env_set_hex("fdt_addr_r", (ulong)fdt);
224 static uint64_t get_linear_ram_size(void)
226 void *fdt = get_fdt_virt();
231 memory = fdt_path_offset(fdt, "/memory");
232 prop = fdt_getprop(fdt, memory, "reg", &len);
234 if (prop && len >= 16)
235 return *(uint64_t *)(prop+8);
237 panic("Couldn't determine RAM size");
240 int board_eth_init(bd_t *bis)
242 return pci_eth_init(bis);
245 #if defined(CONFIG_OF_BOARD_SETUP)
246 int ft_board_setup(void *blob, bd_t *bd)
254 void print_laws(void)
256 /* We don't emulate LAWs yet */
259 phys_size_t fixed_sdram(void)
261 return get_linear_ram_size();
264 phys_size_t fsl_ddr_sdram_size(void)
266 return get_linear_ram_size();
271 phys_size_t ram_size;
274 * Create a temporary AS=1 map for the fdt
276 * We use ESEL=0 here to overwrite the previous AS=0 map for ourselves
277 * which was only 4k big. This way we don't have to clear any other maps.
281 /* Fetch RAM size from the fdt */
282 ram_size = get_linear_ram_size();
284 /* And remove our fdt map again */
287 /* Create an internal map of manually created TLB maps */
288 init_used_tlb_cams();
290 /* Create a dynamic AS=0 CCSRBAR mapping */
291 assert(!tlb_map_range(CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
292 1024 * 1024, TLB_MAP_IO));
294 /* Create a RAM map that spans all accessible RAM */
295 setup_ddr_tlbs(ram_size >> 20);
297 /* Create a map for the TLB */
298 assert(!tlb_map_range((ulong)get_fdt_virt(), get_fdt_phys(),
299 1024 * 1024, TLB_MAP_RAM));
304 /* We don't emulate LAWs yet */
307 static uint32_t get_cpu_freq(void)
309 void *fdt = get_fdt_virt();
310 int cpus_node = fdt_path_offset(fdt, "/cpus");
311 int cpu_node = fdt_first_subnode(fdt, cpus_node);
312 const char *prop = "clock-frequency";
313 return fdt_getprop_u32_default_node(fdt, cpu_node, 0, prop, 0);
316 void get_sys_info(sys_info_t *sys_info)
318 int freq = get_cpu_freq();
320 memset(sys_info, 0, sizeof(sys_info_t));
321 sys_info->freq_systembus = freq;
322 sys_info->freq_ddrbus = freq;
323 sys_info->freq_processor[0] = freq;
326 int get_clocks (void)
330 get_sys_info(&sys_info);
332 gd->cpu_clk = sys_info.freq_processor[0];
333 gd->bus_clk = sys_info.freq_systembus;
334 gd->mem_clk = sys_info.freq_ddrbus;
335 gd->arch.lbc_clk = sys_info.freq_ddrbus;
340 unsigned long get_tbclk (void)
342 void *fdt = get_fdt_virt();
343 int cpus_node = fdt_path_offset(fdt, "/cpus");
344 int cpu_node = fdt_first_subnode(fdt, cpus_node);
345 const char *prop = "timebase-frequency";
346 return fdt_getprop_u32_default_node(fdt, cpu_node, 0, prop, 0);
349 /********************************************
351 * return system bus freq in Hz
352 *********************************************/
353 ulong get_bus_freq (ulong dummy)
356 get_sys_info(&sys_info);
357 return sys_info.freq_systembus;
361 * Return the number of cores on this SOC.
363 int cpu_numcores(void)
366 * The QEMU u-boot target only needs to drive the first core,
367 * spinning and device tree nodes get driven by QEMU itself
373 * Return a 32-bit mask indicating which cores are present on this SOC.
377 return (1 << cpu_numcores()) - 1;