2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
27 #include <asm/cache.h>
28 #include <asm/immap_85xx.h>
29 #include <asm/fsl_serdes.h>
33 #include <fdt_support.h>
42 DECLARE_GLOBAL_DATA_PTR;
44 #define VSC7385_RST_SET 0x00080000
45 #define SLIC_RST_SET 0x00040000
46 #define SGMII_PHY_RST_SET 0x00020000
47 #define PCIE_RST_SET 0x00010000
48 #define RGMII_PHY_RST_SET 0x02000000
50 #define USB_RST_CLR 0x04000000
51 #define USB2_PORT_OUT_EN 0x01000000
53 #define GPIO_DIR 0x060f0000
55 #define BOARD_PERI_RST_SET VSC7385_RST_SET | SLIC_RST_SET | \
56 SGMII_PHY_RST_SET | PCIE_RST_SET | \
59 #define SYSCLK_MASK 0x00200000
60 #define BOARDREV_MASK 0x10100000
61 #define BOARDREV_C 0x00100000
62 #define BOARDREV_D 0x00000000
64 #define SYSCLK_66 66666666
65 #define SYSCLK_100 100000000
67 unsigned long get_board_sys_clk(ulong dummy)
69 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
70 u32 val_gpdat, sysclk_gpio;
72 val_gpdat = in_be32(&pgpio->gpdat);
73 sysclk_gpio = val_gpdat & SYSCLK_MASK;
84 int board_early_init_f (void)
86 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
88 setbits_be32(&gur->pmuxcr,
89 (MPC85xx_PMUXCR_SDHC_CD |
90 MPC85xx_PMUXCR_SDHC_WP));
97 u32 val_gpdat, board_rev_gpio;
98 volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
100 struct cpu_type *cpu;
102 val_gpdat = in_be32(&pgpio->gpdat);
103 board_rev_gpio = val_gpdat & BOARDREV_MASK;
104 if (board_rev_gpio == BOARDREV_C)
106 else if (board_rev_gpio == BOARDREV_D)
109 panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
112 printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
114 setbits_be32(&pgpio->gpdir, GPIO_DIR);
117 * Bringing the following peripherals out of reset via GPIOs
118 * 0 = reset and 1 = out of reset
119 * GPIO12 - Reset to Ethernet Switch
120 * GPIO13 - Reset to SLIC/SLAC devices
121 * GPIO14 - Reset to SGMII_PHY_N
122 * GPIO15 - Reset to PCIe slots
123 * GPIO6 - Reset to RGMII PHY
124 * GPIO5 - Reset to USB3300 devices 1 = reset and 0 = out of reset
126 clrsetbits_be32(&pgpio->gpdat, USB_RST_CLR, BOARD_PERI_RST_SET);
131 int misc_init_r(void)
133 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
134 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
135 ccsr_gpio_t *gpio = (void *)CONFIG_SYS_MPC85xx_GPIO_ADDR;
137 setbits_be32(&gpio->gpdir, USB2_PORT_OUT_EN);
138 setbits_be32(&gpio->gpdat, USB2_PORT_OUT_EN);
139 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_ELBC_OFF_USB2_ON);
144 int board_early_init_r(void)
146 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
147 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
148 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
149 unsigned int orig_bus = i2c_get_bus_num();
153 if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0,
154 1, &i2c_data, sizeof(i2c_data)) == 0) {
156 puts("NOR Flash Bank : Secondary\n");
158 puts("NOR Flash Bank : Primary\n");
160 if (i2c_data & 0x1) {
161 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
162 puts("SD/MMC : 8-bit Mode\n");
163 puts("eSPI : Disabled\n");
165 puts("SD/MMC : 4-bit Mode\n");
166 puts("eSPI : Enabled\n");
169 puts("Failed reading I2C Chip 0x18 on bus 1\n");
171 i2c_set_bus_num(orig_bus);
174 * Remap Boot flash region to caching-inhibited
175 * so that flash can be erased properly.
178 /* Flush d-cache and invalidate i-cache of any FLASH data */
182 /* invalidate existing TLB entry for flash */
183 disable_tlb(flash_esel);
185 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
186 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
187 0, flash_esel, BOOKE_PAGESZ_16M, 1);
193 #ifdef CONFIG_TSEC_ENET
194 int board_eth_init(bd_t *bis)
196 struct fsl_pq_mdio_info mdio_info;
197 struct tsec_info_struct tsec_info[4];
200 unsigned int vscfw_addr;
203 SET_STD_TSEC_INFO(tsec_info[num], 1);
207 SET_STD_TSEC_INFO(tsec_info[num], 2);
211 SET_STD_TSEC_INFO(tsec_info[num], 3);
212 if (is_serdes_configured(SGMII_TSEC3)) {
213 puts("eTSEC3 is in sgmii mode.\n");
214 tsec_info[num].flags |= TSEC_SGMII;
219 printf("No TSECs initialized\n");
222 #ifdef CONFIG_VSC7385_ENET
223 /* If a VSC7385 microcode image is present, then upload it. */
224 if ((tmp = getenv ("vscfw_addr")) != NULL) {
225 vscfw_addr = simple_strtoul (tmp, NULL, 16);
226 printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
227 if (vsc7385_upload_firmware((void *) vscfw_addr,
228 CONFIG_VSC7385_IMAGE_SIZE))
229 puts("Failure uploading VSC7385 microcode.\n");
231 puts("No address specified for VSC7385 microcode.\n");
234 mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
235 mdio_info.name = DEFAULT_MII_NAME;
236 fsl_pq_mdio_init(bis, &mdio_info);
238 tsec_eth_init(bis, tsec_info, num);
240 return pci_eth_init(bis);
244 #if defined(CONFIG_OF_BOARD_SETUP)
245 extern void ft_pci_board_setup(void *blob);
247 void ft_board_setup(void *blob, bd_t *bd)
249 const char *soc_usb_compat = "fsl-usb2-dr";
250 int err, usb1_off, usb2_off;
254 ft_cpu_setup(blob, bd);
256 base = getenv_bootm_low();
257 size = getenv_bootm_size();
259 #if defined(CONFIG_PCI)
260 ft_pci_board_setup(blob);
261 #endif /* #if defined(CONFIG_PCI) */
263 fdt_fixup_memory(blob, (u64)base, (u64)size);
265 #if defined(CONFIG_HAS_FSL_DR_USB)
266 fdt_fixup_dr_usb(blob, bd);
269 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
270 /* Delete eLBC node as it is muxed with USB2 controller */
271 if (hwconfig("usb2")) {
272 const char *soc_elbc_compat = "fsl,p1020-elbc";
273 int off = fdt_node_offset_by_compatible(blob, -1,
276 printf("WARNING: could not find compatible node"
277 " %s: %s.\n", soc_elbc_compat,
281 err = fdt_del_node(blob, off);
283 printf("WARNING: could not remove %s: %s.\n",
284 soc_elbc_compat, fdt_strerror(err));
289 /* Delete USB2 node as it is muxed with eLBC */
290 usb1_off = fdt_node_offset_by_compatible(blob, -1,
293 printf("WARNING: could not find compatible node"
294 " %s: %s.\n", soc_usb_compat,
295 fdt_strerror(usb1_off));
298 usb2_off = fdt_node_offset_by_compatible(blob, usb1_off,
301 printf("WARNING: could not find compatible node"
302 " %s: %s.\n", soc_usb_compat,
303 fdt_strerror(usb2_off));
306 err = fdt_del_node(blob, usb2_off);
308 printf("WARNING: could not remove %s: %s.\n",
309 soc_usb_compat, fdt_strerror(err));