2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Authors: Roy Zang <tie-fei.zang@freescale.com>
5 * Chunhe Lan <Chunhe.Lan@freescale.com>
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/cache.h>
15 #include <asm/processor.h>
17 #include <asm/immap_85xx.h>
18 #include <asm/fsl_pci.h>
19 #include <fsl_ddr_sdram.h>
20 #include <asm/fsl_portals.h>
21 #include <fsl_qbman.h>
23 #include <fdt_support.h>
30 #include <fsl_dtsec.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 int board_early_init_f(void)
36 fsl_lbc_t *lbc = LBC_BASE_ADDR;
38 /* Set ABSWP to implement conversion of addresses in the LBC */
39 setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
46 printf("Board: P1023 RDB\n");
52 void pci_init_board(void)
54 fsl_pcie_init_board(0);
58 int board_early_init_r(void)
60 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
61 int flash_esel = find_tlb_idx((void *)flashbase, 1);
64 * Remap Boot flash + PROMJET region to caching-inhibited
65 * so that flash can be erased properly.
68 /* Flush d-cache and invalidate i-cache of any FLASH data */
72 if (flash_esel == -1) {
73 /* very unlikely unless something is messed up */
74 puts("Error: Could not find TLB for FLASH BASE\n");
75 flash_esel = 2; /* give our best effort to continue */
77 /* invalidate existing TLB entry for flash + promjet */
78 disable_tlb(flash_esel);
81 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
82 MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
83 0, flash_esel, BOOKE_PAGESZ_256M, 1);
85 setup_qbman_portals();
90 unsigned long get_board_sys_clk(ulong dummy)
95 unsigned long get_board_ddr_clk(ulong dummy)
100 int board_eth_init(bd_t *bis)
102 ccsr_gur_t *gur = (ccsr_gur_t *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
103 struct fsl_pq_mdio_info dtsec_mdio_info;
106 * Need to set dTSEC 1 pin multiplexing to TSEC. The default setting
109 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TSEC1_1);
111 dtsec_mdio_info.regs =
112 (struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
113 dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
115 /* Register the 1G MDIO bus */
116 fsl_pq_mdio_init(bis, &dtsec_mdio_info);
118 fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_PHY_ADDR);
119 fm_info_set_phy_address(FM1_DTSEC2, CONFIG_SYS_FM1_DTSEC2_PHY_ADDR);
121 fm_info_set_mdio(FM1_DTSEC1,
122 miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
123 fm_info_set_mdio(FM1_DTSEC2,
124 miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
126 #ifdef CONFIG_FMAN_ENET
130 return pci_eth_init(bis);
133 #if defined(CONFIG_OF_BOARD_SETUP)
134 int ft_board_setup(void *blob, bd_t *bd)
139 ft_cpu_setup(blob, bd);
141 base = env_get_bootm_low();
142 size = env_get_bootm_size();
144 fdt_fixup_memory(blob, (u64)base, (u64)size);
146 #ifdef CONFIG_HAS_FSL_DR_USB
147 fsl_fdt_fixup_dr_usb(blob, bd);
150 fdt_fixup_fman_ethernet(blob);