2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/immap_85xx.h>
26 #include <asm/processor.h>
27 #include <asm/fsl_ddr_sdram.h>
28 #include <asm/fsl_ddr_dimm_params.h>
30 #include <asm/fsl_law.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 /* CONFIG_SYS_DDR_RAW_TIMING */
36 * Hynix H5TQ1G83TFR-H9C
38 dimm_params_t ddr_raw_timing = {
40 .rank_density = 536870912u,
41 .capacity = 536870912u,
42 .primary_sdram_width = 32,
48 .n_banks_per_sdram_device = 8,
50 .burst_lengths_bitmask = 0x0c,
53 .caslat_X = 0x1e << 4, /* 5,6,7,8 */
64 .refresh_rate_ps = 7800000,
68 int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
69 unsigned int controller_number,
70 unsigned int dimm_number)
72 const char dimm_model[] = "Fixed DDR on board";
74 if ((controller_number == 0) && (dimm_number == 0)) {
75 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t));
76 memset(pdimm->mpart, 0, sizeof(pdimm->mpart));
77 memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1);
83 void fsl_ddr_board_options(memctl_options_t *popts,
85 unsigned int ctrl_num)
88 popts->clk_adjust = 6;
89 popts->cpo_override = 0x1f;
90 popts->write_data_delay = 2;
91 popts->half_strength_driver_enable = 1;
92 /* Write leveling override */
94 popts->wrlvl_override = 1;
95 popts->wrlvl_sample = 0xf;
96 popts->wrlvl_start = 0x8;
97 popts->trwt_override = 1;
100 for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
101 popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER;
102 popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS;