1 /* Copyright 2013 Freescale Semiconductor, Inc.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <fsl_esdhc.h>
14 #include <spi_flash.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 phys_size_t get_effective_memsize(void)
20 return CONFIG_SYS_L2_SIZE;
23 void board_init_f(ulong bootflag)
26 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
27 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
31 /* Clock configuration to access CPLD using IFC(GPCM) */
32 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
34 #ifdef CONFIG_P1010RDB_PB
35 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
38 /* initialize selected port with appropriate baud rate */
39 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
41 gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
43 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
44 gd->bus_clk / 16 / CONFIG_BAUDRATE);
46 #ifdef CONFIG_SPL_MMC_BOOT
47 puts("\nSD boot...\n");
48 #elif defined(CONFIG_SPL_SPI_BOOT)
49 puts("\nSPI Flash boot...\n");
51 /* copy code to RAM and jump to it - this should not return */
52 /* NOTE - code has to be copied out of NAND buffer before
53 * other blocks can be read.
55 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
58 void board_init_r(gd_t *gd, ulong dest_addr)
60 /* Pointer is writable since we allocated a register for it */
61 gd = (gd_t *)CONFIG_SPL_GD_ADDR;
64 memset(gd, 0, sizeof(gd_t));
65 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
66 memset(bd, 0, sizeof(bd_t));
68 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
69 bd->bi_memsize = CONFIG_SYS_L2_SIZE;
73 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
74 CONFIG_SPL_RELOC_MALLOC_SIZE);
75 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
77 #ifndef CONFIG_SPL_NAND_BOOT
80 #ifdef CONFIG_SPL_MMC_BOOT
84 /* relocate environment function pointers etc. */
85 #ifdef CONFIG_SPL_NAND_BOOT
86 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
87 (uchar *)CONFIG_ENV_ADDR);
88 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
96 gd->ram_size = initdram(0);
97 #ifdef CONFIG_SPL_NAND_BOOT
98 puts("\nTertiary program loader running in sram...");
100 puts("\nSecond program loader running in sram...");
103 #ifdef CONFIG_SPL_MMC_BOOT
105 #elif defined(CONFIG_SPL_SPI_BOOT)
107 #elif defined(CONFIG_SPL_NAND_BOOT)